Chuck(G)
25k Member
Part 5 of this series can be found here.
In the previous post, we discussed using Minilog to derive our GAL equations from PAL raw data.
We fed Minilog the following data:
Running Minilog on this specifying equation output in sum-of-products form yields the following:
So there the equations are. Note that the equation for Bit 2 of the output is 0; meaning that the output pin isn't used.
GALs are normally programmed with a JEDEC-format file (.JED file), which is produced by a program that takes equations and other specifications and produces a fuse bitmap.
Since I'm using National Semi GAL16V8 chips, I'm going to use NS's EQN2JED compiler. It's an old DOS-mode tool and can be found here as part of the Opal package.
We need to massage the Minilog equations slightly to conform with EQN2JED syntax and add a few more bits and pieces to the compiler input file to specify pin assignments and devices. After a few minutes' work, we get the following equation (.EQN) file:
Run it into EQN2JED and you get several output files; a .JED file for your programmer and a .LOG file showing how things fit together:
So now we're ready to program the GAL...
See how it all turns out in part 7...
In the previous post, we discussed using Minilog to derive our GAL equations from PAL raw data.
We fed Minilog the following data:
Code:
table PAL10L8
INPUT I9 I8 I7 I6 I5 I4 I3 I2 I1 I0
OUTPUT O7 O6 O5 O4 O3 O2 O1 O0
0000000000 00001011
0000000001 00001011
0000000010 00000010
0000000011 00000010
0000000100 00000011
0000000101 00000011
0000000110 00000010
0000000111 00000010
0000001000 00001001
0000001001 00001001
0000001010 00000000
0000001011 00000000
0000001100 00000001
0000001101 00000001
0000001110 00000000
0000001111 00000000
0000010000 00000011
0000010001 00000011
0000010010 00000010
0000010011 00000010
0000010100 00000011
0000010101 00000011
0000010110 00000010
0000010111 00000010
0000011000 00000001
...more stuff...
END
Running Minilog on this specifying equation output in sum-of-products form yields the following:
Code:
MINIMIZATION RESULT STATISTICS
==============================
FOUND 10 ESSENTIAL PRODUCT TERMS
MAXIMUM FANIN: 7
TOTAL LITERAL COUNT: 37
MAXIMUM PRODUCT TERM SIZE: 4
MAXIMUM OUTPUT FUNCTION SIZE: 2
INPUT SIGNAL | OUTPUT SIGNAL REPRESENTATION
A : I9 F : I4 | S : O7 X : O2
B : I8 G : I3 | T : O6 Y : O1
C : I7 H : I2 | U : O5 Z : O0
D : I6 I : I1 | V : O4
E : I5 J : I0 | W : O3
MINIMIZED EQUATIONS
S = CEI' + BC
T = BC + CF'I'
U = AB'HJ'
V = DI
W = F'H'I'
X = 0
Y = EH'I' + D'G'
Z = H'I' + B'I'
So there the equations are. Note that the equation for Bit 2 of the output is 0; meaning that the output pin isn't used.
GALs are normally programmed with a JEDEC-format file (.JED file), which is produced by a program that takes equations and other specifications and produces a fuse bitmap.
Since I'm using National Semi GAL16V8 chips, I'm going to use NS's EQN2JED compiler. It's an old DOS-mode tool and can be found here as part of the Opal package.
We need to massage the Minilog equations slightly to conform with EQN2JED syntax and add a few more bits and pieces to the compiler input file to specify pin assignments and devices. After a few minutes' work, we get the following equation (.EQN) file:
Code:
; Equation file for AT&T 6300 display PL68 PAL.
CHIP PL68 16V8
; Pin assignments.
i0=1 i1=2 i2=3 i3=4 i4=5 i5=6 i6=7 i7=8 i8=9 gnd=10
i9=11 o7=12 o6=13 o5=14 o4=15 o3=16 o2=17 o1=18 o0=19 vcc=20
EQUATIONS
/o7 = i7*i5*/i1 + i8*i7
/o6 = i8*i7 + i7*/i4*/i1
/o5 = i9*/i8*i2*/i0
/o4 = i6*i1
/o3 = /i4*/i2*/i1
; /o2 = 0 Don't care
/o1 = i5*/i2*/i1 + /i6*/i3
/o0 = /i2*/i1 + /i8*/i1
Run it into EQN2JED and you get several output files; a .JED file for your programmer and a .LOG file showing how things fit together:
Code:
QN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Log file for galgen.eqn
Device: 16V8
Pin Label Type
--- ----- ----
1 i0 pos,com input
2 i1 pos,com input
3 i2 pos,com input
4 i3 pos,com input
5 i4 pos,com input
6 i5 pos,com input
7 i6 pos,com input
8 i7 pos,com input
9 i8 pos,com input
10 gnd ground pin
11 i9 pos,com input
12 o7 neg,com output
13 o6 neg,com output
14 o5 neg,com output
15 o4 neg,com output
16 o3 neg,com output
17 o2 unused
18 o1 neg,com output
19 o0 neg,com output
20 vcc power pin
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Device Utilization:
No of dedicated inputs used : 10/10 (100.0%)
No of dedicated outputs used : 2/2 (100.0%)
No of feedbacks used as dedicated outputs : 5/6 (83.3%)
------------------------------------------
Pin Label Terms Usage
------------------------------------------
19 o0 2/8 (25.0%)
18 o1 2/8 (25.0%)
16 o3 1/8 (12.5%)
15 o4 1/8 (12.5%)
14 o5 1/8 (12.5%)
13 o6 2/8 (25.0%)
12 o7 2/8 (25.0%)
------------------------------------------
Total Terms 11/64 (17.2%)
------------------------------------------
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Chip diagram (DIP)
._____ _____.
| \__/ |
i0 | 1 20 | vcc
i1 | 2 19 | o0
i2 | 3 18 | o1
i3 | 4 17 | o2
i4 | 5 16 | o3
i5 | 6 15 | o4
i6 | 7 14 | o5
i7 | 8 13 | o6
i8 | 9 12 | o7
gnd | 10 11 | i9
|______________|
So now we're ready to program the GAL...
See how it all turns out in part 7...