I have a detailed manual pertaining to an ARM7TDMI CPU, which I believe suports the "ARM4" instruction set. I don't by any means have a solid grasp of what the differences are between each generation of instruction set or each generation of hardware architecture, or which corresponds to which. But I also have an instruction chart with labels indicating which generation an instruction first appeared. So I wrote some code, which I don't think uses any instruction exclusive to ARM4 or later. It runs on a Gameboy Advance emulator, but it does not run under RISC OS inside the RPCemu. Specifically, RPCemu complains that a certain opcode is invalid. The opcode is $E1DC80B0, which should be a perfectly valid LDRH instruction.
The RPCemu readme.txt says it emulates an "ARM7500" so I looked up a datasheet for that. It says that it contains an "ARM7" core but nevertheless makes no mention of LDRH or half-words. Very confusing. Was there really an early version of ARM that could not load a 16-bit word? Or is there a different reason that RPCemu doesn't handle the opcode?
The RPCemu readme.txt says it emulates an "ARM7500" so I looked up a datasheet for that. It says that it contains an "ARM7" core but nevertheless makes no mention of LDRH or half-words. Very confusing. Was there really an early version of ARM that could not load a 16-bit word? Or is there a different reason that RPCemu doesn't handle the opcode?