Visual 1050 Memory Map / ROM disassembly tips?

[dcymbal]

Anybody have an idea what the memory map layout of the 1050 is -- specifically the layout of boot and graphics ROMs?

I have a ROM dump of the Z-80 boot and 6502 video ROMs. I would like to disassemble these for study purposes -- of course it's challenging (for me any way) when you don't know where the data vs. code boundaries are. Any tips on ways to do this appreciated.

Someday I hope to learn enough about this system to be able to get an emulator off the ground. There are several good Z-80 and 6502 emulator cores available for use so no need to reinvent the wheel there, but I am lacking in technical details for other areas of the system required for an emulator. Any low-level details in this area also appreciated.

Thank You.

 

[Terry Yager]

The CP/M page zero jumps are usually fairly standard. Look for BDOS bottom around E800h and BIOS around C800h on a 64K system. I forget which byte in zero page points to the BIOS (byte 5?), but if you find a jump to one of those areas, it's probably worth investigating.

--T

 

[dcymbal]

Well I have been working through things little by little using disassemblers dz80 and dis6502 and have been able to find some subroutines to access the hardware devices. There's no C/PM involved yet here, since the Z80 ROM is what winds up loading C/PM off the boot device and replacing itself. I haven't gotten that far yet!

If anyone is interested in some of the details of this system, I have been trying to put a page together here that collects this information into one place:

http://bramante.metabarn.com/visual1050/

If anyone has any of these docs or can fill in any of the holes let me know!

Cheers.