30 pin SIMM memory for RC2014 z80 Processor

[lowen]

That’s a good chip to use and you’ve got the right strategy to test the loose chips. You may find some of the loose chips are not programmable, that JTAG interface is not working. That is a common problem encountered with used CPLD. EPM7128S can be designed with free Quartus tool (rev 13 or before) which is far superior to WinCUPL.

There is a tool to convert from the Altera MAX7128 format to Atmel ATF1508. I've not tried it myself, but it's called POF2JED; an app note about it is at https://ww1.microchip.com/downloads/en/Appnotes/DOC0916.PDF

So you could use Quartus to do the design, convert with POF2JED, and program it into an ATF1508. In theory, at least. I have been meaning to try this out with some of your designs, but just haven't taken the time or effort yet.

 

[bakemono]

If I'm not mistaken, Rodney said he used POF2JED for his ATX 286 project? I have used WinCUPL successfully for ATF750 chips. I've never managed to uncover the secret of how to program an ATF150x. Still hoping they get added to the XGecu T56 support list.

[strike]I think I'll grab one of those $1 EPM240s and see if I can't make a PCI device out of it. [/strike] Nevermind, aliexpress won't let me register an account lol

 

[-N2]

If I'm not mistaken, Rodney said he used POF2JED for his ATX 286 project? I have used WinCUPL successfully for ATF750 chips. I've never managed to uncover the secret of how to program an ATF150x. Still hoping they get added to the XGecu T56 support list.

I think I'll grab one of those $1 EPM240s and see if I can't make a PCI device out of it...

a longer term project goal is to build PCI bus CPU cards.

 

[lowen]

.... I've never managed to uncover the secret of how to program an ATF150x. Still hoping they get added to the XGecu T56 support list.

There's an open source solution out there: https://github.com/roscopeco/atfprog-tools (hardware can be bought, or there's a gift at https://github.com/roscopeco/ATF150x-Programming-Board )

I haven't personally tried it; I have an 'official' Atmel programmer. ATF150x uses an in circuit system not terribly different from the MAX7000S chips.

I think I'll grab one of those $1 EPM240s and see if I can't make a PCI device out of it...

This look really neat, and EPM240 is a capable chip, with the proper level converters

 

[Plasmo]

I have several retro designs (Z80, Z180, 6502, 68000) based on EPM240 published in retrobrewcomputers forum. In all cases I drove the CPU directly without voltage translation. EPM240 has internal 1K flash sufficiently large to load system program from SD card, so an external ROM is not needed as long as the design has a SD card. This resulted in small mezzanine boards roughly the same size as the EPM240 development board.

I have also purchased EPM240 chips on eBay in quantity of 10 for about $1.50 each. They appeared to work well.

I have tried POF2JED converting designs in Quartus to program ATF150x. It worked for less dense designs, but when design is near 100% utilized, the translation frequently do not work. Ultimately I decided to buy large batch of EPM7xxx and forget about ATF150x.

 

[Dwight Elvey]

I'm late on this thread but I thought I'd mention that if you use the Z80 refresh it only does 128 cycle refresh.most all the SIMMs are 256 cycle. I found that out the hard way. Because we needed to ship product, The low 128 locations on each 256 boundary worked fine. I added to a timer interrupt ( that was needed anyway ) to read the high 128 bits. This worked but it was not what I wanted to do. Most dram has 2 millisecond or better refresh timing.
Dwight

 

[-N2]

I'm late on this thread but I thought I'd mention that if you use the Z80 refresh it only does 128 cycle refresh.most all the SIMMs are 256 cycle. I found that out the hard way. Because we needed to ship product, The low 128 locations on each 256 boundary worked fine. I added to a timer interrupt ( that was needed anyway ) to read the high 128 bits. This worked but it was not what I wanted to do. Most dram has 2 millisecond or better refresh timing.
Dwight

This is why I started looking into programable logic, as I was already aware that the Z80 could only support 7 bits in its DRAM refresh circuit. Add to this a desire to have bank switching and here we are talking about CPLD chips.

Digging a bit deeper I am curious what precautionary steps I will need to take when making the pages as large as possible (perhaps even 64KB) With my admittedly very limited experience designing hardware for the Z80 I have wondered if I can leverage hardware in the IO address space as a scratchpad memory device to hop between memory pages.

 

[Plasmo]

Software can handle 64K page, but it is restrictive and slow. 32K pages are common and supported by many software.

I bought many pounds of SIMM sticks many years ago. I have already picked out the SIMM72 for several retro projects. Yesterday I went back to the SIMM collection and picked out about 25 SIMM30. They are 1 meg and 4 meg SIMM. Now I’m interested in building a SIMM30 tester based on Z80.
Bill

 

[-N2]

Software can handle 64K page, but it is restrictive and slow. 32K pages are common and supported by many software.

I bought many pounds of SIMM sticks many years ago. I have already picked out the SIMM72 for several retro projects. Yesterday I went back to the SIMM collection and picked out about 25 SIMM30. They are 1 meg and 4 meg SIMM. Now I’m interested in building a SIMM30 tester based on Z80.
Bill

If I am to provide any contribution to that project it would be this, please implement support for the 16 meg SIMM sticks

 

[lowen]

I'm late on this thread but I thought I'd mention that if you use the Z80 refresh it only does 128 cycle refresh.most all the SIMMs are 256 cycle. I

This is a solved problem, as of October 1987 at least. Page 2 of https://archive.org/details/80-micro-oct-1987-upgrade-your-m-4-to-320-k/mode/1up has the necessary circuitry to extend the Z80 built-in refresh to 256-cycle. The article text describes its operation. There are other mods for the 4 and 4P by others that do similar things. The essence is to count 128 cycles and toggle a bit each set of 128, and that becomes your 8th bit. It doesn't even have to be "in phase" with the Z80's refresh counter; it just needs to toggle every 128th instance of the refresh signal.

I built a mod very much like that one myself, expanding my Z80-based TRS-80 Model 4 to 320K. As far as I know all 256K DRAM chips are 256-cycle.

This is why I started looking into programable logic, as I was already aware that the Z80 could only support 7 bits in its DRAM refresh circuit. Add to this a desire to have bank switching and here we are talking about CPLD chips.

Digging a bit deeper I am curious what precautionary steps I will need to take when making the pages as large as possible (perhaps even 64KB) With my admittedly very limited experience designing hardware for the Z80 I have wondered if I can leverage hardware in the IO address space as a scratchpad memory device to hop between memory pages.

There have been many schemes over the years to bank switch. As Plasmo said, 32K pages are common and well supported. The TRS-80 Models II and 4 both do 32K pages using two different schemes; the Model II uses a distributed write-only I/O port for page select. Plasmo has several designs for this sort of thing that are well tested.

It'll be an interesting project for you to solve that yourself, though; don't think that just because someone else did it a certain way that you can't learn from doing it a different way.

 

[Eudimorphodon]

This is a solved problem, as of October 1987 at least. Page 2 of https://archive.org/details/80-micro-oct-1987-upgrade-your-m-4-to-320-k/mode/1up has the necessary circuitry to extend the Z80 built-in refresh to 256-cycle. The article text describes its operation. There are other mods for the 4 and 4P by others that do similar things. The essence is to count 128 cycles and toggle a bit each set of 128, and that becomes your 8th bit. It doesn't even have to be "in phase" with the Z80's refresh counter; it just needs to toggle every 128th instance of the refresh signal.

I was going to suggest you could do something similar to this very easily with a GAL. There’s a lot of ways to skin this cat to get extra bits. (I don’t think you’d even need a counter that goes to 128? it seems like you could just flip the 8’th bit on the rise OR fall of the seventh compared to the last state it was during the refresh cycle, IE, essentially do a carry when it rolls over to your bits. Would mean you’d have to latch the last state of the bit during a refresh for the comparison, which makes it a little less straightforward.)

Edit: another GAL friendly technique which essentially accomplishes the same as above would be to use 7 pins essentially like a ‘688 to match on a particular bit pattern during the refresh cycle and use that to generate the toggle. (Or “carry”, if you’re extending this to *more* than 8 bits. Even the 8 registers in the smaller 16v8 should be enough for refreshing any size 30 pin simm the old fashioned way.)

 

[Plasmo]

This is a SIMM30 tester piggyback on top of a ZRC, a RC2014 Z80 SBC. ZRC already has a 2megX8 DRAM for memory, so the simplest approach is to disable onboard DRAM and route the DRAM signals to SIMM30 socket. The 100-pin EPM7128S has sufficient pins to drive duplicate set of DRAM multiplexed addresses and controls.

 

[Dwight Elvey]

I realize that circuits could be added, I just wanted to make him aware. In my case, it was not a custom board and I needed to make the product work. I was noting that it is not necessary to make hardware changes if one has a timer based interrupt. In my case I had a 1 millisecond interrupt. The DRAM doesn't care if you are specifically doing a hardware driven interrupt or simply doing a read. The Z80 has several good instructions for automatically reading a block of memory, quickly.
It is just an alternate way to deal with refresh that one might not, normally, think off.

 

[lowen]

....
It is just an alternate way to deal with refresh that one might not, normally, think off.

Oh, certainly. The IBM PC designers used a DMA channel if I remember correctly; there's more than one way to go about it.

 

[-N2]

I realize that circuits could be added, I just wanted to make him aware. In my case, it was not a custom board and I needed to make the product work. I was noting that it is not necessary to make hardware changes if one has a timer based interrupt. In my case I had a 1 millisecond interrupt. The DRAM doesn't care if you are specifically doing a hardware driven interrupt or simply doing a read. The Z80 has several good instructions for automatically reading a block of memory, quickly.
It is just an alternate way to deal with refresh that one might not, normally, think off.

I would prefer the refreshing to be handled in hardware so the programmers don't have to factor it into their code.