• Please review our updated Terms and Rules here

Netronics Explorer/85

There is a set/reset latch formed out of U108 and U115 generating the signal /BOOT ACTIVE. This signal is set active (LOW) on a reset.

The above signal is fed into U107.

When the CPU outputs an address in the range $Fxxx OR the /BOOT ACTIVE signal is active, then the MONITOR ROM inside U105 is activated.

I suspect that the signal /MONITOR CS should really be MONITOR CS.

Basically, on a reset, the monitor ROM will respond to addresses $0xxx, $1xxx, ... , $Fxxx.

Once the monitor ROM is running (say following a reset) the latch can be 'flipped' and the monitor ROM will now only respond to addresses in the range $Fxxx. I can't remember now (off the top of my head) how you flip the latch. You probably read from (or write to) a specific I/O port address.

EDIT: The logic for flipping the latch is a little more convoluted than I first remembered... It may take me a little longer to find the relevant information again, so I will leave that as an exercise for the reader!

Dave
 
Last edited:
Hi. The ROM monitor of the Netronics Explorer/85 computer allows the step by step execution of a user program. This is implemented with the help of the 8155 timer and the trap interrupt line of the 8085: the timer is set with a count such when the first user program instruction is executed, the processor is interrupted and the monitor kicks in to show part of the execution environment.

I don’t own the original hardware at this moment, but I would like to ask to somebody that owns it if this functionality really works.

My question pops up because I cannot make this work in an emulated environment, since the timer is being programmed with 197 cycles, but the launch function for the user program takes 211 cycles, so the program is always interrupted before starting the execution of the user program. In the monitor program listing you can find online, you can see that somebody else also annotated this, so I’m really curious in knowing if this feature ever worked correctly without patching the ROM:

092680ca5d19dc32ee8e2457c9f13a7e430817bd_2_690x133.jpeg


Thanks in advance!

Federico
 
Hi Federico,
Finally got a chance to fire up my system and perform a single-step, which does work. I then verified that I have a value of C5 at address F22B. Sorry, the mystery continues. I then put a scope on the Trap input of my system during single-step and got a low going pulse of 31.92us each time I would step. As I interpret the 8155 data sheet, the mode that the EXP85 uses is "continuous square wave" (the 40H @ F227) in which the 8155 timer counts down by two - once for the high side of the square wave and once again for the low side. If the count is odd, as ours is, the extra count goes to the high side of the square wave. So for 197 it would be 99 counts high, 98 counts low. 98 times a 325ns clock period = 31.85us - a difference of only 70ns from what I got on the scope, so the math and operation of the 8155 seem to check out.

Also, the 8155 timer starts counting upon receiving the "start" command @ F233 so the subsequent JMP RSTOR instruction @ F235 would add an additional 10 clock cycles of time before starting the next instruction of the user program (so 221, correct?). Still a small, but important, difference.

I realize that this does not solve your issue, but I hope it helps in some small way...
Good hunting!
-Joe
 
Thanks a lot Joe for taking the time and effort for testing this; having this information I have discovered that somehow the MAME emulator is also using the 6.144MHz clock for the 8155, even if it is specified otherwise. Duplicating (+ 1 cycle) the number of cycles used in the ROM the debugger works as expected:

Screenshot 2023-08-01 153053.png

I will look now for why MAME is behaving like this.

Thanks!

Best regards,

Federico
 
Hi Federico,
Glad to hear you are closing in on the issue, well done!!
I looked a little further into the RSTOR routine starting @ F59F and this section of code is only 197 cycles in length (not 211) due to a test (@ F5AA) of the Interrupts Enabled flag - two instructions (14 cycles) are always skipped.
Best
-Joe
 
Hi Joe,

May I ask you for one more measurement? Could you please check the CLK in of the TIMER IN (pin 3) of the 8155? Because it should be 1/2 of the crystal frequency, but that's the same as the internal clock frequency of the 8085A, in which case I still don't understand how can the 8085A execute 197 cycles while the 8155 counts 99 cycles.

Thanks!

Best regards,

Federico
 
Hi Joe, please disregard the last message, I have found the problem in the behavior of the trap detection in the emulator.

Thanks!

Federico
 
nomisimon said:
Hi Dwight. I'm not sure there was a need for such a curt reply sir. The chap I was responding too asked originally if any floppy disc controller would work, which it should. Breadboarding an S100 floppy controller and writing the code for the boot ROM is a substantial task, even if you have the skills...which not everyone does. Back when these boards were new, I used to write code and design circuits too...I'm not an idiot. If someone is looking to recreate something from the ground up, fine...but I got the impression the chap was simply looking to get his machine up and running, and offered my opinion accordingly. The card is indeed useless without the PROM...unless you're prepared to spend the time writing the code for one. I could build a circuit to read my PROM...but am reluctant to in case I accidentally damage the only one I have. I joined this forum to ask for help where needed, offer my help where I could and to share information, not...with all due respect, to be scolded like a child. Simon.
Click to expand...
if anyone still needs ROM dump for netronics floppy-1 controller here it is:
the chip is IM5610 (32 bytes)

11011011
11101100
10101111
01101111
01100111
00111100
11010011
11101010
00111110
10001100
11010011
11101000
11011011
11101100
10110111
11110010
00011001
00000000
11011011
11101011
01110111
00100011
11000011
00001100
00000000
11011011
11101000
10110111
11001010
01111101
00000000
01110110
 
robolom said:
if anyone still needs ROM dump for netronics floppy-1 controller here it is:
the chip is IM5610 (32 bytes)

11011011
11101100
10101111
01101111
01100111
00111100
11010011
11101010
00111110
10001100
11010011
11101000
11011011
11101100
10110111
11110010
00011001
00000000
11011011
11101011
01110111
00100011
11000011
00001100
00000000
11011011
11101000
10110111
11001010
01111101
00000000
01110110
Click to expand...
it is a simple 32 byte boot loader
INIT:
in 0ECh ;WAIT FOR HOME
xra a ;SETS A TO 0
mov l,a ;START LOCATION IN RAM = 0
mov h,a
inr a ;SETS A TO 1
out 0EAh ;SET SECTOR REGISTER
mvi a,08Ch ;GET READ COMMAND
out 0E8h ;ISSUE COMMAND TO 1771
NEXT:
in 0ECh ;WAIT FOR INTRQ OR DRQ
ora a ;SET FLAGS
jp DONE ;DONE IF INTRQ
in 0EBh ;READ BYTE FROM CONTROLLER
mov m,a ;MOVE IT TO RAM
inx h ;ADVANCE ONE BYTE
jmp NEXT ;READ NEXT BYTE
DONE:
in 0E8h ; ;READ DISK STATUS
ora A
jz 0x007D ;START CPM ON NOERROR
hlt
 
robolom said:
it is a simple 32 byte boot loader
INIT:
in 0ECh ;WAIT FOR HOME
xra a ;SETS A TO 0
mov l,a ;START LOCATION IN RAM = 0
mov h,a
inr a ;SETS A TO 1
out 0EAh ;SET SECTOR REGISTER
mvi a,08Ch ;GET READ COMMAND
out 0E8h ;ISSUE COMMAND TO 1771
NEXT:
in 0ECh ;WAIT FOR INTRQ OR DRQ
ora a ;SET FLAGS
jp DONE ;DONE IF INTRQ
in 0EBh ;READ BYTE FROM CONTROLLER
mov m,a ;MOVE IT TO RAM
inx h ;ADVANCE ONE BYTE
jmp NEXT ;READ NEXT BYTE
DONE:
in 0E8h ; ;READ DISK STATUS
ora A
jz 0x007D ;START CPM ON NOERROR
hlt
Click to expand...
in HEX:
DBECAF6F673CD3EA3E8CD3E8DBECB7F21900DBEB7723C30C00DBE8B7CA7D0076
 
assuming you have original JAWS 64K RAM board that supplies necessary voltages to this Floppy-1 controller (INS1771, INS8251), you can write to RAM but not read until ROM is active
 
now the important addresses:

Port1 :
0xE0 - Input
0xE1 - Output

Port2:
0xE2 - Input
0xE3 - Output
 
You must log in or register to reply here.
Back
Top