pbirkel@gmail.com
Veteran Member
I find myself faced with the task of reverse engineering an undocumented 15x15" two-layer fully populated PCB. The bus into which it plugs is also undocumented. It's principally populated by MSI TTL, with some resistor packs, and lots of thin traces and vias. All of the ICs/packs are well-labeled common parts, so that's a plus. I do have general expectations regarding circuit functionality, but nothing particularly specific beyond power rails, bypass caps, and inferences associated with prominant ICs (CPU, SRAM, UART, RS-232 receivers/transmitters).
I've done some preliminary tracing, enough to realize that some important functional subcircuits are implemented using scattered ICs and long traces; my immediate problem being abnormal power-up reset behavior where the associated circuitry is quite elaborate and unintuitive (thus far). AFAICS I'll need to reverse engineer major areas of the PCB in order to suss out the reasons for the current behavior. I have several PCBs of comparable complexity that I'll eventually want to fully reverse engineer, so I'm contemplating the best way to go about the task. Not sure how to most effectively and efficiently apply "elbow grease".
All that I've read seems to reduce to using an ohm meter to confirm visual trace-and-via following with special fun where traces disappear under ICs. Then diagramming IC logic with identified connectivity. Then assorting logic into comprehensible patterns/subcircuits. Possibly having to go back and check for trace branching hidden under ICs where it seems that there may be missing logical connections. Then probing those logical subcircuits to ascertain signal patterns under operational conditions. Lather, rinse, repeat.
I'm interested in the approaches that others have used in this sort of scenario; means and methods, tools and techniques, time/effort savers, effective short-cuts, etc.
Thank you for sharing your advice and experience!
I've done some preliminary tracing, enough to realize that some important functional subcircuits are implemented using scattered ICs and long traces; my immediate problem being abnormal power-up reset behavior where the associated circuitry is quite elaborate and unintuitive (thus far). AFAICS I'll need to reverse engineer major areas of the PCB in order to suss out the reasons for the current behavior. I have several PCBs of comparable complexity that I'll eventually want to fully reverse engineer, so I'm contemplating the best way to go about the task. Not sure how to most effectively and efficiently apply "elbow grease".
All that I've read seems to reduce to using an ohm meter to confirm visual trace-and-via following with special fun where traces disappear under ICs. Then diagramming IC logic with identified connectivity. Then assorting logic into comprehensible patterns/subcircuits. Possibly having to go back and check for trace branching hidden under ICs where it seems that there may be missing logical connections. Then probing those logical subcircuits to ascertain signal patterns under operational conditions. Lather, rinse, repeat.
I'm interested in the approaches that others have used in this sort of scenario; means and methods, tools and techniques, time/effort savers, effective short-cuts, etc.
Thank you for sharing your advice and experience!