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Programming PALs

L

leaknoil

Experienced Member
Joined
Aug 14, 2008
Messages
425
Location
Central California
I know nothing at all about programming pals but, I need one done. I think I have a programmer that will write them but, I need to check. It may not. Still I would need a binary file to dump even if it did. I, in fact, know so little I have no idea how one gets a binary out of the following listing. Can anyone make this PAL for me or clue a noob how to do it ? I've done my share of eproms but, that's about it.

PAL Equations:

PAL16R4A
S4 P5.1
CONVERGENT TECHNOLOGIES 4/9/86

CLK /PHSTAT NC DID NC NC DHDSEL /MCRSEL /RST GND
/OE /SPCLK /AA IDB NC NC /HDSEL3 /BB D4 VCC
IF(PHSTAT) /D4 = /IDB
/IDB := /DID
IF(VCC) AA = /RST
IF(VCC) BB = AA
HDSEL3 := BB* DHDSEL
IF(VCC) SPCLK = RST + MCRSEL
 
Your equations are part of a PAL Design Specification for an old version of PALASM. In this format, line 1 defines part type (16R4) and line 5 starts the pin definitions from 1 to 20. I could create a JEDEC file for you to download to a PAL Programmer. However you are missing the Function Table used to create the Test Vectors which in turn are used to verify the part after programming. A part could still be programmed but you would not know if it fused properly until installed in your board. I have an old Data I/O programmer that can probably program this part (at least in a DIP package), if yours can not. Do you have the parts? Are they bipolar parts or CMOS parts? If you are going to buy the part, try to get a CMOS erasable type. The older bipolar parts are fused link types (like PROMs) and can be programmed only once.
 
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leaknoil said:
The part isnt actually specified and I haven't bought anything yet. This is where the listing comes from http://unixpc.taronga.com/documents/P5.1 This was the part I was thinking of buying http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=296-10090-5-ND

I don't really know what speed I need even. Its only to allow the disk controller to address more than 8 heads on a mfm drive on a 10mhz 68000 system. I wouldn't think I would need faster then 150ns.
Click to expand...

It looks like the part you are considering is a Texas Instruments bipolar 15 nS part. With the simple equations you are trying to mechanize (few levels of logic), it should do fine and you can probably even live with a slower part. The part called out in the design specification is a 16R4A which is rated for 25 MHz and is slower than the one you are looking at.

This would be a good excuse for me to put a LogicPak into my Data I/O 29B, insert my PALASM adapter, and assemble your source code into a JEDEC output file. I'll reverse engineer a small set of test vectors from your equations such that at least a minimal test of the device can be done after programming.
 
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I added a truth table to the PAL Design Specification such that the part can be verified after fusing. Verification will catch any DOA parts; an important test considering the parts are 30 years old. Can anybody double check? Note that the registered outputs are forced high until there is a clock transition.

There is also an important sounding input term called "/OE" that does not appear in any of the equations which is a little scary.

Code: 
PAL16R4A
S4 P5.1
CONVERGENT TECHNOLOGIES 4/9/86
Line 4
CLK /PHSTAT NC DID NC NC DHDSEL /MCRSEL /RST GND
/OE /SPCLK /AA IDB NC NC /HDSEL3 /BB D4 VCC
 
IF(PHSTAT) /D4 = /IDB
/IDB := /DID
IF(VCC) AA = /RST
IF(VCC) BB = AA
HDSEL3 := BB* DHDSEL
IF(VCC) SPCLK = RST + MCRSEL
 
FUNCTION TABLE
;**************INPUTS*****************   #########OUTPUTS########
 
CLK /PHSTAT DID DHDSEL /MCRSEL /RST /OE /SPCLK /AA IDB /HDSEL3 /BB D4
--------------------------------------------------------------------------
L       H    L     X       L    L    X    L     H   H     H     H   Z
L       H    H     X       H    H    X    H     L   H     H     L   Z
L       L    L     X       H    L    X    L     H   H     H     H   H
L       L    H     X       L    H    X    L     L   H     H     L   H
C       L    L     L       L    L    X    L     H   L     H     H   L
C       L    H     L       H    H    X    H     L   H     H     L   H
C       L    L     H       H    L    X    L     H   L     H     H   L
C       L    H     H       L    H    X    L     L   H     L     L   H
--------------------------------------------------------------------------
DESCRIPTION
It's only to allow the disk controller to address more than 8 heads on 
a mfm drive on a 10mhz 68000 system.
 
dave_m said:
There is also an important sounding input term called "/OE" that does not appear in any of the equations which is a little scary.
Click to expand...

OK, I checked the 16R4 pinout and /OE (pin 11) is not a problem. It is only the tri-state enable for the output register and it is not used as an input into the gate array and so does not need to be in the equations.
 
JED file

JED file

OK the file assembled and simulated correctly. I'll leave the JEDEC file named PAL16R4.jed HERE for a few days for you to download. It looks mostly ASCII but there are a few weird characters at the beginning and end so handle as a binary file.
-Dave
 
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