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Really cheap CP/M

K

Koolstar42

Experienced Member
Joined
Sep 24, 2019
Messages
68
Location
Netherlands
Hi all

I recently finished my latest project, which is a i8080 CP/M computer, emulated in an ATMega88 on a circuit board the size of about half a credit card.
This originally is the brainchild of Takashi Toyoshima, but fixed and drastically improved upon. It now has 128kByte of banked memory, accepts SC and HC SD cards, has RTS handshaking and is multiboot.
In essence it runs CP/M 2.2 and CP/M 3.1 at an apparent clock of 2.5-3.5 MHz. It uses a micro SD card with up to 254 8Mbyte disk 'Volumes', which can be mounted on each of the 3 system drives A:-C:
When a volume is prepared with a working system track it will be bootable.
Initially only volume 2 and 3 are mad bootable. Volume 2 with CP/M 2.2 and Volume 3 with CP/M 3.1.
When a certain volume is booted, the following 2 are mounted on B: and C:, but this can be changed with a supplied MOUNT tool.
Volumes can be formatted, and made bootable with a PUTSYS tool.
Volumes 10-12 contain a collection of programs like dbaseii, wordstar, asssemblers, interpreters and compilers etc as well as the infocom games and ADV.
Volumes 20-57 contain the complete CPM/UG and SIGM libraries, both archived and extracted. The rest of the volumes is currently unused.

The system has only one serial interface to the outside world. It is fixed at 38400 baud with RTS handshake. It is plug-compatible with FTDI interface boards but accepts both 3.3 and 5v adapters. The board is powered with 5v (primarily by the interface) and the i/o is protected with level shifters. Average power consumption is about 10 mA

And now the best part, This system can be built for less than 10 dollars (used to be 5, but times change...) I am aware that not everybody is comfortable soldering SMD parts, therefore I may be willing to build one for you. However I only have a limited amount of parts available. And shipping is a pita nowadays.
And of course all the associated files, Kicad, gerbers, source files disk images etc are available if you want to do it yourself.

RienkCPMega88_front.jpgCPMega88_back.jpg
 
Why not one of the pre-made inexpensive MCU boards? Plenty of memory available, as well as microSD and USB--some even have networking.

Just curious about your choice of an old MCU needing external memory.
 
I had CP/M 2.2 running on my Pi Pico. Was kinda neat something so tiny running CP/M. Not really very useful and no easy way to get extra software onto it. But since I had one I figured why not.
 
The 5 dollar price point? (that's what I paid for it initially) And it is fun getting it to work. Because I can? Seriously, You are asking in a vintage forum why I'm using old parts?
 
There's old and then there's old. ATMega88 is newer than most CP/M gear. $5 for an assembled unit is probably not likely today. The Pi Micro is probably the most bang for the buck.

But hey, it's your project; don't let me rain on your parade. :)
 
Is an image for the SD card available anywhere to download?

BTW: I’ve got a github project to map logical drives B: thru P: to any physical partition 1-65535. It implements •NIX type directory commands (MKDIR, CD, PWD) to navigate thru the partitions like directories.
See HFS4CPM
 
You should assemble and test few boards and put them on eBay auction starting from $5 and see what people are willing to pay.
Bill
 
Chuck(G) said:
But hey, it's your project; don't let me rain on your parade. :)
Click to expand...

It'd be hypocritical for me to complain, considering I'm using an Atmega MCU in my own long-running toy computer project to emulate a different part, specifically a 6545-ish CRTC. (My mental justification is that all it's doing in that job is replacing an ungainly pile of programmable counters and comparators, it's not executing any user code.) Emulating the actual CPU "feels" a little different to me personally, but, eh, it's all a good time.

I'm kind of curious how much of a speed hit you'd get using one of those SPI RAMs instead of the parallel one. I guess probably quite a lot in situations where the memory reads weren't coming from consecutive locations.
 
Yes, SPI SRAM is great for block transfers at 20MHz, but really bogs down if you're randomly accessing bytes. You can improve on this a bit by using QuadSPI devices, which have 4 times the speed, but require 3 extra I/Os. TAANSTAFL.
 
Typo: "There ain't no such thing as a free lunch". First encountered it myself in "The Moon is a Harsh Mistress". I was a big Heinlein reader then. Lately, have been reading Pohl in "Beyond the Blue Event Horizon".
 
@geowar1: I believe you are more interested in the Z80 version of the SD card is it not? The first 57 volumes zip to some 90 Mbytes, too large for here. PM me an email address and I'll send them to you. They are just a stack of 8MByte images with the following layout:

diskdef 8mb-hd
seclen 128
tracks 512
sectrk 128
blocksize 4096
maxdir 512
skew 0
boottrk 1
os 2.2
end

These are used for a FPGA version of my design. The first 7 images boot to dos+, CP/M 2, CP/M 3, MPM, BASIC,ZSDOS and ZPM3. The rest is just software as listed in the included textfile, (volumes may have shifted somewhat)

I'll find a way to post all the relevant files on the CPMega88. It is quite a lot...
 

Attachments

  • system51.txt
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@Chuck: I appreciate your sentiment. I like this little board, because it 'feels' like a classic system. And I have plenty of those too. I personally see little difference in emulating on a pi pico or on a modern PC.
At current EBAY and JLCPCB prices, including shipping, you can build one for about 7 bucks, provided you make 10 of them. I need to pay more, because I have to pay VAT on everything.

@Bill: nah, I'm not wanting to make any money on this. If somebody is interested, I'll help out. If not, fine with me too
 
@Koolstar42, I can deal with emulation, as I wrote an MS-DOS based emulator myself back in 1987. I wanted to integrate CP/M programs fully into the DOS environment, rather than isolate them in a box. And it worked quite well--on a DOS (or emulated DOS) system, you can use PIP, DDT and ED like any other DOS utility. Note that I emulated both the CPU and CP/M, so that the CBIOS area starts at 0fe00h, as it's mostly a lot of calls to x86 code in the environment.

Since I was emulating the CPU, I added the capability to trap I/O accesses and divert them to user-supplied routines. In a couple of cases, we were able to replace x80-based PLCs driving large machines with PCs.

The nutty thing is that I still run the emulator under emulated MSDOS running on x64 Linux.
 
Chuck(G) said:
Typo: "There ain't no such thing as a free lunch". First encountered it myself in "The Moon is a Harsh Mistress". I was a big Heinlein reader then. Lately, have been reading Pohl in "Beyond the Blue Event Horizon".
Click to expand...
I read lots of Heinlein years ago. I can't say for sure I've ever read any Pohl. I would think I had as I am a big Sci-Fi fan. I'll have to look into some of his works to see and maybe try to find "Beyond the Blue Event Horizon" to see what it's about.
 
I like it K - I've messed around with this type of thing on and off a bit, but never got it this far.

Is your 8080 code in C or ASM? I thnk mine was C and clock for clock it took about 9 cycles (AVR) to 1 cycle (8080) to emulate and I figured I couldn't go faster without doing the 8080 core in ASM.

Have you run the cpu tests on your 8080 code?
 
Chuck(G) said:
Yes, SPI SRAM is great for block transfers at 20MHz, but really bogs down if you're randomly accessing bytes. You can improve on this a bit by using QuadSPI devices, which have 4 times the speed, but require 3 extra I/Os. TAANSTAFL.
Click to expand...

Back when everyone and their dog was playing with the Parallax Propeller I briefly had ambitions to try porting a TRS-80 emulator someone wrote for it that required a complicated parallel RAM board to use one of those SPI RAMs instead, because some back of the envelope calculations (which were probably highly optimistic) made me think that it might not be that much of a problem and doing that would have let me port the rest of the emulator to the dinky dev board someone gave me when they got tired of it. (Which didn't have enough free I/Os to do the RAM board.) But I never actually got around to it so I don't know how foolish that ambition actually was...

That said, I think the only reason I arrived at that conclusion was because the structure of the Propeller specifically would have allowed me to offload the SPI wrangling to a dedicated core, thus allowing the emulator proper do other things while memory fetches clunked away in the background. (Since a Z80 can never do anything in less than four clock cycles the germ of the idea was to have that other core constantly do block prefetches into its cog RAM in the background, and maybe if I were super clever I could figure out some way to "pipeline" the main emulator thread and look a few instructions ahead to guess at where an absolute memory read or branch might go and pass that to the memory cog so it could set itself up to fetch/cache a few bytes from there before it was actually needed.) Obviously this isn't something you could do with a single-threaded CPU.
 
You could come close with just about any moderately-muscled modern MCU equipped with SPI DMA. On the other hand, a moderately-muscled MCU probably has enough on-chip memory for the job--and pipelined instruction execution and other goodies...
 
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