Although I was able to collect data from a floppy drive via FPGA, I don't have a working prototype yet. The next steps include:
A write-enabled controller is a stretch goal. I believe I can do it, but it's more important to get reads working (for preservation) before I worry about writes. The goal is to create a controller which can bypass most forms of copy protection by providing commands to fine tune how floppy tracks are written.
In the coming days, I will be moving this series of blog posts to my domain https://wdj-consulting.com under my Anachronism blog. I'll post a link to the exact page when ready. I hope you will join me there as I continue to make this project a reality. I do believe I finally am capable of doing it. Just need to budget my time better.
All-in-all, I'd consider this a half success, No prototype, but I was able to unite a bunch of scattered information into a set of blog posts.
- Discussing clock and data windows
- Discussing IBM track format
- Creating the front end of a floppy controller exposed to a programmer
- Publish my IPython notebooks consisting of data capture and building each FPGA component in a Python-to-Verilog library
- Deployment and testing on real floppies
- More pretty pictures.
A write-enabled controller is a stretch goal. I believe I can do it, but it's more important to get reads working (for preservation) before I worry about writes. The goal is to create a controller which can bypass most forms of copy protection by providing commands to fine tune how floppy tracks are written.
In the coming days, I will be moving this series of blog posts to my domain https://wdj-consulting.com under my Anachronism blog. I'll post a link to the exact page when ready. I hope you will join me there as I continue to make this project a reality. I do believe I finally am capable of doing it. Just need to budget my time better.
All-in-all, I'd consider this a half success, No prototype, but I was able to unite a bunch of scattered information into a set of blog posts.