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Hi All,
Im looking for expressions of interest on this S100 system. There are many boards as pictured (links below). The main system is an 18 slot backplane with a Z80 master (own design) and x86 slave, this is a 80386 board (a reworked design of John at s100computers) and/or a 8086 board (Johns design). There are multiple other boards, my own 8MB SRAM board for the S100 bus (two of 0-8MB 9-16MB), I think only populated with 2MB currently. An FPGA i/o board (my design), the 80386 32MB RAM board (John design) still needs finishing with OTT ribbon), Compact flash board. There is a Serial i/o board with a Flash 25P storage chip on it, this is my own design and makes development of code really quick.. no more writing proms.
As it stands the system bootstraps itself from the Z80 "loader" prom that gets the system into a Z80 monitor via reading it off a flash device, the user can then select to switch over to the x86 slave. When the slave is up, there is another monitor (written in x86 source) and one can move the system into protected mode. There are general i/o and debugging routines in each monitor. Im happy to provide the source and whatever resources I have. I'm also happy to provide PCB files and there is a stack of bare PCB's enough to make close to another system x2 or 3. The current backplane is not terminated as I only use CMOS buffers. i think i have a terminated 18 slot backplane, if i find it ill throw it in.
Happy to give any more detail, just ask
Im looking for expressions of interest on this S100 system. There are many boards as pictured (links below). The main system is an 18 slot backplane with a Z80 master (own design) and x86 slave, this is a 80386 board (a reworked design of John at s100computers) and/or a 8086 board (Johns design). There are multiple other boards, my own 8MB SRAM board for the S100 bus (two of 0-8MB 9-16MB), I think only populated with 2MB currently. An FPGA i/o board (my design), the 80386 32MB RAM board (John design) still needs finishing with OTT ribbon), Compact flash board. There is a Serial i/o board with a Flash 25P storage chip on it, this is my own design and makes development of code really quick.. no more writing proms.
As it stands the system bootstraps itself from the Z80 "loader" prom that gets the system into a Z80 monitor via reading it off a flash device, the user can then select to switch over to the x86 slave. When the slave is up, there is another monitor (written in x86 source) and one can move the system into protected mode. There are general i/o and debugging routines in each monitor. Im happy to provide the source and whatever resources I have. I'm also happy to provide PCB files and there is a stack of bare PCB's enough to make close to another system x2 or 3. The current backplane is not terminated as I only use CMOS buffers. i think i have a terminated 18 slot backplane, if i find it ill throw it in.
Happy to give any more detail, just ask