TRS-80 Model 4 and the apocryphal Z80-socket-compatible 48-pin Z800 design

[Petrofsky]

I finally got around to really taking a look at the TRS-80 Model 4 Z800 support, and I was surprised to learn that the hypothetical Z800 that the Model 4 can accommodate was not only never produced, but was never even publicly announced, and is substantially different from the hypothetical Z800 that Zilog was publicly promising for years but never producing.

Frank Durda wrote in 2002 (Usenet newsgroup comp.sys.tandy, message-id GuDxHq.1ACA@nemesis.lonestar.org, 11 Apr 2002):

The Z800 processor was to give us the same Z80 instruction set, run faster, support more opcodes, be a 16-bit environment, and have all sorts of other goodies just kept refusing to appear. We knew about it under NDA as early as 1982. We would call Zilog and every time we called for two years after that, the story was the same: Thay had about 10,000 gates to go before the Z800 would be finished. We waited and waited.

The Model 4 came with the expected pin-out for the Z800 already on the boards (they had databooks on this non-existent part), but by the time the 4P and later the gate-array Model 4/4D motherboard came out, there was no improvement from Zilog, so the board real estate was reclaimed to make the boards smaller and cheaper.

On sheet one of the Model 4 schematics it says, "Z80 IS A 40 PIN DEVICE PLACED IN UPPER 40 PINS OF A 48 PIN SOCKET".

Thus, it seems that the early "expected pin-out for the Z800" must have been that there would be 48 pins, with the upper 40 pins (numbered 1-20 and 29-48) identical to pins 1 to 40 of the Z80, and the new features on pins 21-28. This would allow designs where the Z800 could be a drop-in replacement for a Z80. The two new pins that the Model 4 uses are pins 27 and 28, which it labels A16 and /EXTMEM. The idea seems to be that you could upgrade by just dropping in a Z800 and adding a jumper to E9-E10 to turn off the MAPON signal (see sheet 2). The memory mapping PAL chip in U72 (part 8075468) would then present the 128k RAM as a contiguous 128k span of memory in the Z800's larger address space, rather than as the complicated bank-switched 32k sections that are presented to the Z80 (see the U72 PAL equations).

However, I can't find any other information about this plan for a 48-pin Z800 with a Z80-compatible pinout. The earliest date on the schematic is the "DRAFT" sign-off by S.D. Hatfield on November 1, 1982. But on October 14, 1982, Zilog had already publicly said that the first Z800 chips would be 40-pin, and by April 1983 Zilog had announced there would be 40-pin and 64-pin versions, and in September 1983 the full pinouts were published and seem to have remained unchanged from then on (until the Z800 became the 68-pin (square, not DIP) Z280). The 40-pin design made space for the new pins by multiplexing the eight Z80 data lines with eight of the address lines. In the 64-pin chips, all the extra pins were also used for new features, with the data lines and address lines shared just as in the 40-pin chips. These pinouts would have rendered impractical the idea of a single board into which you could plug a Z80 or Z800. (The 64-pin chip was also going to use 0.07" pin spacing rather than 0.1", so it wouldn't have even physically been able to share a socket with a Z80.)

So, I'm thinking the reason that Tandy dropped the dual-chip-support feature when designing the Model 4P and the gate-array 4 was not so much that they had lost faith that Zilog would ever come through on its promised chip, but because Zilog had already said, pretty early on, that it would never produce the early-concept, Z80-socket-compatible 48-pin Z800 chip.

Has anyone else seen the secret 48-pin Z800 documentation that Frank said Tandy had access to in 1982?



 

[lowen]

It would be cool to see, but whatever existed under NDA is likely long gone, at least from the Tandy side. Not sure about the Zilog side. Jerry Ballard might know, if he's still around.