nikola-wan
Veteran Member
@WaveyDipole updated his fork of the experimental 405x Emulator:
He added these features:
The 405x Emulator has always had an RTC, but I suggest you download and run John's latest version in this folder since it is the one I use all the time:
https://github.com/Twilight-Logic/Tek405xEmulator/tree/master/experimental
I had been checking the experimental 405x emulator performance against one of my 1979 4051 performance tests:
I clocked the performance of that loop at 13 seconds on my 4051 in 1979. Sounds slow - but the 4051 had a Motorola 6800 @800KHz with no hardware floating point and Tek 4050 BASIC ONLY supported double-precision floating point numbers as they were targeting the scientific and technical market.
One of the biggest features of the 4052 and 4054 was the custom bit-slice 16-bit CPU which included hardware floating point and had sixteen 16-bit registers!
John updated the mc6800.js file to provide variable emulator speed on demand, and when I tested his changes, I found I needed to set his new const SPDF = 1311.1;
That change with his updated code looks very close to the 13 second benchmark - so possibly will work fine on other PCs - John will give me his 4051 test result soon.
I decided to create a benchmark program - which is actually now a set of 4050 benchmark programs:
I added the printout of the final X after the benchmark completes.
Here is the full speed report for the 405x Emulator:
very consistent performance increase.
I typically set the experimental emulator to 10x to simulate the speed of my 4052 and 4054A, and 100X to create my BITMAP, PLOT10 and PICTURE files.
Here is my 4052 benchmark result:
almost 10x faster (9.3x)
and here is my 4054A benchmark result:
9.42X - slightly faster than my 4052.
This is actually a surprise, since my recovery of a CYCLE III Tektronix 4050 factory test tape that I got from Stan Griffiths in 2000 had a routine to determine the number of FOR/NEXT loops to create a 1 second delay.
This code used the RND(0) value to determine the specific 4050 model and a DATA statement for each model which then provided the delay loop value.
The 4051 delay loop value was 217, and the 4052 and 4054 had a value of 1805 (about 8.3x the 4051), and the 4052A/4054A had a value of 1516 (about 6.9x the 4051).
I have been assuming this was due to the addition of all the new A-Series BASIC commands including structured BASIC.
But I don't know what firmware version was being tested and suspect the A-Series version 1.5 that I have in my 4054A is newer than the version the factory was testing - or since they were only trying to get short delays between tests - maybe they didn't notice or care that the values could change with firmware versions. My 4052 also has the latest 5.1 firmware version - last one reported in the Tektronix service note 30_July_1983, but that service note showed the A-Series up to 1.4 and my EPROMs are marked 1.5.
He added these features:
- Added Fractional second resolution to @daver2 's original GPIB Device 2 RTC
- Added an icon on the top left of the emulator window to change the speed of the Emulator: 1x, 2x, 5x, 10x, 20x, 50x, 100x !
The 405x Emulator has always had an RTC, but I suggest you download and run John's latest version in this folder since it is the one I use all the time:
https://github.com/Twilight-Logic/Tek405xEmulator/tree/master/experimental
I had been checking the experimental 405x emulator performance against one of my 1979 4051 performance tests:
Code:
X=1.01
FOR I=1 TO 1000
X=X*1.01
NEXT II clocked the performance of that loop at 13 seconds on my 4051 in 1979. Sounds slow - but the 4051 had a Motorola 6800 @800KHz with no hardware floating point and Tek 4050 BASIC ONLY supported double-precision floating point numbers as they were targeting the scientific and technical market.
One of the biggest features of the 4052 and 4054 was the custom bit-slice 16-bit CPU which included hardware floating point and had sixteen 16-bit registers!
John updated the mc6800.js file to provide variable emulator speed on demand, and when I tested his changes, I found I needed to set his new const SPDF = 1311.1;
That change with his updated code looks very close to the 13 second benchmark - so possibly will work fine on other PCs - John will give me his 4051 test result soon.
I decided to create a benchmark program - which is actually now a set of 4050 benchmark programs:
- Menu program (file 1) that detects and displays what model 4051, 4052 or 4054 computer you have, then asks if you have an RTC
- I'm not aware of any RTC for the 4051, but for the 405x Emulator it is GPIB device 2, and an INPUT @2:A$ will return the PC date and time in A$
- There was a Tektronix RTC for the 4052 but I don't know of any that are working. @jdreesen added a TransEra 741RTC to his 4052/4054 Multifunction ROM Pack as an option
- The menu program shows which model 4050 computer you are running and loads the correct benchmark program file
- 405x Emulator Benchmark (file 2) - uses the @2: RTC and benchmarks the time for all the speeds: 1x, 2x, 5x, 10x, 20x, 50x, 100x
- Results for all seven speeds are printed to file 10
- 4050 Benchmark (file 3) - no RTC, you must manually time the benchmark - the program beeps to start when you press RETURN key and beeps when benchmark is complete
- 4052/4054 with MFM RTC (file 4) - uses the 741RTC CALL "!TIME" to retrieve current HH:MM:SS.DDD with second and fractional seconds
- Result is printed to file 10
- ASCII Result file (file 10)
- TLIST (file 11)
- LAST (file 12)
I added the printout of the final X after the benchmark completes.
Here is the full speed report for the 405x Emulator:
very consistent performance increase.
I typically set the experimental emulator to 10x to simulate the speed of my 4052 and 4054A, and 100X to create my BITMAP, PLOT10 and PICTURE files.
Here is my 4052 benchmark result:
almost 10x faster (9.3x)
and here is my 4054A benchmark result:
9.42X - slightly faster than my 4052.
This is actually a surprise, since my recovery of a CYCLE III Tektronix 4050 factory test tape that I got from Stan Griffiths in 2000 had a routine to determine the number of FOR/NEXT loops to create a 1 second delay.
This code used the RND(0) value to determine the specific 4050 model and a DATA statement for each model which then provided the delay loop value.
The 4051 delay loop value was 217, and the 4052 and 4054 had a value of 1805 (about 8.3x the 4051), and the 4052A/4054A had a value of 1516 (about 6.9x the 4051).
I have been assuming this was due to the addition of all the new A-Series BASIC commands including structured BASIC.
But I don't know what firmware version was being tested and suspect the A-Series version 1.5 that I have in my 4054A is newer than the version the factory was testing - or since they were only trying to get short delays between tests - maybe they didn't notice or care that the values could change with firmware versions. My 4052 also has the latest 5.1 firmware version - last one reported in the Tektronix service note 30_July_1983, but that service note showed the A-Series up to 1.4 and my EPROMs are marked 1.5.