Which minicomputer architectures used "skips" to branch and had no stack?

[traveler_aa5]

I used the IBM ATOM (A Tiny Optimized Microcontroller) in the IBM 5224 and 5225 printers. It had a 2 level call stack. If your subroutines went more than two levels, you were toast. When I started working on this, this guy showed me this "great debug tool" (his words). You connected it to the address bus on the backplane, and set some address switches. When the processor hit that address, it would light up. I said "You never seen an ICE-85?". His reply was "Nope. What's that?"

 

[Al Kossow]

was the part only used in the printer group?

 

[traveler_aa5]

was the part only used in the printer group?

I don't think so. It was developed in Boca Raton, and the assembler ran on MVS and VM. There were 2 used in the printers. One for control, and the other for the Head Image Generator. It was a 4 bit processor with a 12 bit address bus, bank switched to access different memory cards. It was available in a

I lost all information about the ATOM. But I still have some information on the UC0, that was used in several printers. 4214 and 3287 are the ones I worked on.

 

[ggs]

HP21xx series minicomputers had skip and no stack.

 

[Dioda]

There are few more, less known computer systems with satisfy condition 1 or 2, for example Lockheed MAC- 16, SCC 4700, Wang 3300, Texas Instruments 980, Raytheon 703. Condition 2 is sometimes could be little different by saving return address to the special register instead of the first memory location (this is true for TI 980, Apollo Guidance Computer, Raytheon 703, this allows for using ROM e.g. core rope memory in AGC). Computers which fill those two criteria’s are usually quite similar from instruction set architecture point of view. Usually have 1-2 accumulators and 1-2 index registers (sometimes accumulators could be also index regs), only single link/carry/overflow flag and have fixed instruction format. Which consists of op code, few addressing mode bits like zero-page, index, indirect and 8/9-bit address/displacement. This style of ISA seems to be almost industry standard of late 60 and early 70.
Quite interesting sum up of this kind of ISA could be found here: Real Machines with 16, 32, and 30-bit words (quadibloc.com) and here Still More Real Machines (quadibloc.com).