Exchange of ideas, ST506/412/225 disk simulator

[PDP11GY]

regarding to my last thread "Improved RL01/RL02 disk simulator available", November 17th, 2013,
I would like to discuss the problems which arose in the development of the ST506/412 simulator.
In the appendix you will find two documents, the prototype of my interface and the C source code
of the NIOS-II programm. Everything is documented there as I have implemented it. The complete
timing is implemented via Verilog and runs without problems. However, this simulator is being
developed to ensure that it runs on all systems, not only on DEC systems. The different CPU
types, little and big endian are also taken into account in the following way: The MFM-ENcoder
and MFM-DEcoder can be switched between LSB or MSB first to be able to support big endian and
little endian architectures. I also will implement a special feature, the so-called Clone_Mode.
In this mode, the entire contents of the hard disk is copied to the SD-Card. The complete tranfer
is done cylinder by Cylinder and all is controlled by the FPGA. The data are read 1:1, whether
good or bad. Also important, rewriting the Header/Data-CRC can reconstruct the data in some cases.
Since I use the inexpensive DE0-NANO board here, we have a limitation with regard to the onboard
memory size of 32MB. Thus the ST-225 with 25MB is the maximum which can be simulated. All other
would be a question of money. Right now I have a problem, my RD51 and RD50 is defective and
therefore I can not continue with the development of the Clone_Mode. Instead I'm trying to
develop the simulator according to the available descriptions in the documents. But there are
inconsistencies:
-Signal DRV SLCTD, read signal, going to the (RQDX)controller. Is it static asserted ? The RQDX
is polling the available units via Drive-select. If a match occours the DRV SLCTD signal is
asserted but should be released afterwards if no match ?
- TRACK FORMAT:
- ID AM : Customized @ low level format or always "A1FE" ?
- Data AM : Customized @ low level format or always "A1F8" ?
- Idex-Puls length: schould be 200 uSec, but a scope-measurement results in about 350uSec.
Open issues still exist in the low-level formating procedure. Is the complete timing track
rewritten (from index to index) or will be reformated only the Data, CRC's and header?
Last but not least: How is Bad-Block replacement implemented? I only can remember about
RCT ( Replacement Control Table ) und FCT ( Factory control Table ) and dynamic Bad Block
Replacement (DBR) which is a special DEC implementation based on MSCP....but on a RQDX
controller, MSCP is full implemented, correct ? "Now I turn in circles." Based on the
SEAGATE ST506 ServiceManual, I have implemented the data structure via my NIOS-II C-program,
experimented around a lot but the RQDX controller does not recognize my simulated disk.
Again, I have the problem that I have no runable RD50/51 for reference purpose
Summary I try to get a running RD50/51 disk and a RQDX-2/3 replacing my RQDX-1. First I will
continue to work implementing the clone-mode to be able to use the simulator not only for DEC.
Every note from you is welcome. Thanks in advance.

 

[RSX11M+]

Hello Reinhard,

I've read your posted notes and visited your site for the latest status. It's good to see you're well, and read about your latest efforts.

It seems to me that this is the most important impediment to your progress now:

...Right now I have a problem, my RD51 and RD50 is defective and
therefore I can not continue with the development of the Clone_Mode. Instead I'm trying to
develop the simulator according to the available descriptions in the documents. But there are
inconsistencies...

..Again, I have the problem that I have no runable RD50/51 for reference purpose
Summary I try to get a running RD50/51 disk and a RQDX-2/3 replacing my RQDX-1. First I will
continue to work implementing the clone-mode to be able to use the simulator not only for DEC.

If I understand correctly - you intend to continue work on an MFM drive simulator using non-DEC reference hardware. While it's a detour, I hope it will actually help move you forward - perhaps better than if you continued on the DEC path. DEC's implementation on the same hardware is more complex. Temporarily taking a PC based route should serve to remove a lot of that complexity and get you to a working prototype stage quicker, without wasted work either - as the results will apply to the DEC path when you return to it.
​

Does this summarize your thinking?

I therefore take it that you do have MFM PC hardware available to continue with the DE0-NANO based work, even with the 32MB restriction?

I'd like to be able to send you my RD51 drive, unfortunately, I don't know if it's operational. So until I do, it's not worth the cost to send. I can however contribute research effort to answer the other questions that have appeared.

Please indicate which DEC RQDX controllers you have on hand. You mention RQDX1,2,3 but I have the impression that you only have the RQDX1... is that correct?

 

[PDP11GY]

Your summary is basically correct.
I will have MFM PC hardware available from January next year (Schneider PC + IBM PC).
The Computer Museum in München is also available again in the spring time of next year and
I will have access to the parts, like a RQDX-3 and possibly also a RD51, which is located
in a PC350. It is not necessary that you send me your RD disk, but thanks for the offer.
My current useable environment is based on a micro-pdp with RL01/02 simulator, RQDX-1 with
working RX50 but with broken RD51. In the meantime, I have learned a lot from my RL01/RL02
simulator project, like DPR in QSYS and can implement this directly in this project.
A general point is still open: Logic Level converter. I will take a look to the Voltage-Level
Translator - TXB0104. Currently I have 2 defective DE0-Nano boards. The cause was a defective
TTL chip. Fortunately, the DE0-Nano board has two I/O connector)

 

[Al Kossow]

regarding to my last thread "Improved RL01/RL02 disk simulator available", November 17th, 2013,
I would like to discuss the problems which arose in the development of the ST506/412 simulator.

The schematic JPG isn't really high enough resolution to be readable.

 

[g4ugm]

I would really like to get this working an be able replace the ST225 disk in my IBM3174, but as Al says the schematic is hard to read. I also have little knowledge of Verilog, I started learning VHDL and have written a couple fo things in that...

 

[MikeS]

If we're talking about non-DEC applications I'm sure that my fellow Cromemco owners and I would love to see a compatible ST506/412 replacement, even if it is only 20-30MB; unfortunately Cromemco reads and writes an entire track, effectively 10KB 'sectors', so although I think it'd be a little simpler I don't really expect to see any implementation in the foreseeable future...

But it would certainly be nice to have a more or less 'standard' replacement for less than the current $1000+ price...

 

[djg]

If your wanting to make a generic disk emulator and decode the transitions back into sectors you will have to deal with a lots of different formats. I've been playing with using a beaglebone to read disks. Emulating a disk is in the plans also.

- TRACK FORMAT:
- ID AM : Customized @ low level format or always "A1FE" ?
- Data AM : Customized @ low level format or always "A1F8" ?

So far 4 for 4 for different formats from the drives I have. 3 are A1FE A1F8 but different CRC/ECC codes and one a has the header fields differen with one more bytet. One has the same cylinder and head for two tracks. Probably sparing but I haven't figured it out. The fourth doesn't use A1 before the data area and has a weird resync bit before the header and data.

 

[PDP11GY]

@ Al Kossow
I don't understand the resolution problem. How can I help ? Send a PM ?

 

[PDP11GY]

@djg
You have confirmed my main problem: Too many different low-level formats. To get
this problem fixed, I will design the clone-mode. The disadvantage of this is, I
always need a known good disk. Making a generic disk emulator... I have no plan yet
how to do this and may go very difficult ?