Eudimorphodon
Veteran Member
Recently I did some hacking on my Tandy 1000 HX test mule to figure out strategies for freeing up the parts of the memory map occupied by the mostly useless onboard DOS and Deskmate resources so they could be used for expansion memory and peripherals. The mission was mostly successful, and in part to demonstrate that everything works (and in other part because my Commodore 1084 monitors are succumbing to senility-related diseases) I've been running a VGA card in the Tandy "Plus Bus" riser on my combo expansion board since then:
it's been working well, but having the VGA card *does* make the machine incompatible with a significant body of Tandy 1000/PCjr software so I've been wondering if it might be possible to make a "switching" riser that would allow me to disable whatever card is plugged into it with a simple toggle switch. My question is thus: what lines do I need to "switch off" to make this happen?
The first idea I was to use three 74LS244 buffers to completely buffer the address lines A0-A19, with pull-up resistors so when the riser is switched "off" the only address the card will ever see is FFFFFh. I don't think it's likely there will be any ISA cards that decode that area, so... would there be any other lines that would need to be switched for this to work? I would hope most cards would just sit there quietly and never assert themselves on the data bus under these circumstances, but are there cards that might rudely try pulling down other lines if not initialized?
(Also, it's safe to assume that any "normal" ISA card will only read the address lines and not try to assert them? I found one reference that claimed that ISA address bus masters were "possible" but that's going to be a rare exception?)
Alternatively, I was wondering if it *might* be sufficient to simply put a buffer in front of the MEMR/MEMW and IOR/IOW lines, so the plugged in card would never see anything but a "1" on those signals? This would not prevent the chip enable circuitry on the cards from decoding their peripheral addresses... but I'm not sure if that would be an issue or not? The one thing I can kind of imagine is if the card in question has a buffer like a 74LS245 on it that's set up so a "1" on its "DIR" signal sets it for "towards the bus", in which case it might load the bus with whatever it's getting from its "private" side? That shouldn't matter if there's no actual clash between the "hidden" peripheral and what remains active, but I'm worried about the edge case that might exist if, say, a buffer on a video card asserts "nothing" on the bus when onboard video is accessed?
Anyway, curious if anyone's ever built anything like this before.
it's been working well, but having the VGA card *does* make the machine incompatible with a significant body of Tandy 1000/PCjr software so I've been wondering if it might be possible to make a "switching" riser that would allow me to disable whatever card is plugged into it with a simple toggle switch. My question is thus: what lines do I need to "switch off" to make this happen?
The first idea I was to use three 74LS244 buffers to completely buffer the address lines A0-A19, with pull-up resistors so when the riser is switched "off" the only address the card will ever see is FFFFFh. I don't think it's likely there will be any ISA cards that decode that area, so... would there be any other lines that would need to be switched for this to work? I would hope most cards would just sit there quietly and never assert themselves on the data bus under these circumstances, but are there cards that might rudely try pulling down other lines if not initialized?
(Also, it's safe to assume that any "normal" ISA card will only read the address lines and not try to assert them? I found one reference that claimed that ISA address bus masters were "possible" but that's going to be a rare exception?)
Alternatively, I was wondering if it *might* be sufficient to simply put a buffer in front of the MEMR/MEMW and IOR/IOW lines, so the plugged in card would never see anything but a "1" on those signals? This would not prevent the chip enable circuitry on the cards from decoding their peripheral addresses... but I'm not sure if that would be an issue or not? The one thing I can kind of imagine is if the card in question has a buffer like a 74LS245 on it that's set up so a "1" on its "DIR" signal sets it for "towards the bus", in which case it might load the bus with whatever it's getting from its "private" side? That shouldn't matter if there's no actual clash between the "hidden" peripheral and what remains active, but I'm worried about the edge case that might exist if, say, a buffer on a video card asserts "nothing" on the bus when onboard video is accessed?
Anyway, curious if anyone's ever built anything like this before.