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16 bit ISA XMS Board Design?

SOIC is OK, for the final project, but will be difficult for most folks to hand solder. If that’s what it takes to make the board, work, though, it’s ok by me.

- Alex
 
TSOPs are easier to solder than SOICs, due to generally larger lead pitch. Both are doable, though.

The TSOP RAM chips appear to have a lead pitch of 0.8mm, while the SOICs I was looking at for things like the buffers and demuxes are 1.25mm. Does the tighter spacing actually make it easier?
 
The TSOP RAM chips appear to have a lead pitch of 0.8mm, while the SOICs I was looking at for things like the buffers and demuxes are 1.25mm. Does the tighter spacing actually make it easier?
no lol, SOIC is easier but both are fine don't worry about it
 
Normally the SOICs that I end up using have a smaller pitch than that. Just general experience. It’s, of course, all about the pitch size.

- Alex
 
Normally the SOICs that I end up using have a smaller pitch than that. Just general experience. It’s, of course, all about the pitch size.

Yeah, I was looking at the biggest-size ones for the 74x series parts. I have a *little* experience with soldering those and they don't intimidate me *too* much, but my confidence level rapidly plummets after that.

I really wish the company that made those PSRAM chips we decided to go with for this had come through with making the TSSOP version teased in the datasheet of their 8 Megabyte chip, the reduction in package count would certainly be nice. :P

FWIW, I did browse the company's website directly to see what they had on offer, and they do have a four megabyte (2Mx16) SRAM part. It sells for about $25, which would make the RAM cost about twice as much. (The 1MB PSRAM part is around $3.) This part would reduce the number of packages by 75% for a given amount of RAM, but in addition to the cost it's a .5mm pitch part instead of .8mm, and that may be an important threshold because .5 is smaller than the minimum Via diameter on the cheap 2-layer PCB boards, which would not only make soldering a bear it'd also probably make routing a lot harder.

I guess maybe I'm getting a little worried if there are going to be drive/fanout issues with this many parts. Maybe it's nothing to worry about, there's those old S-100 cards with a gazillion SRAMs on them and they seemed to work. It was just sort of making me wonder if there should be a separate set of buffers for, I dunno, each row of 8 or so chips. I guess that's what doing a prototype is supposed to find out.
 
You can always footprint for a buffer and either make traces that need to be cut to use it, or solder jumpers from A to B to replace the chip. Same as whatever part you discussed doing that on earlier in the thread.
 
Any updates? I'm looking to pull the trigger on a 16-bit ISA memory expansion board, ideally one supplying both EMS and XMS. (You can guess which memory-hogging program I'm trying to run.)
 
Any updates? I'm looking to pull the trigger on a 16-bit ISA memory expansion board, ideally one supplying both EMS and XMS. (You can guess which memory-hogging program I'm trying to run.)

I’m sorry, my enthusiasm for this sort of evaporated between the sheer number of IC packages required for the amounts of memory people were hoping for, work turning really busy and trashing my hobby time budget, and the fact that actually prototyping this would have required laying hands on an appropriate guinea pig machine.

(I got some offers for donations on that last part, but that second bullet point, still a problem, made me afraid of commitment.)

If anyone wants to collaborate on a design but take the lead on the actual prototyping I have some Kicad work done, and I also have an *idea* for a full EMS 4.0 memory mapper (that would definitely need someone not me to write a driver for) that I would love to see tried. Maybe I can try to throw what I have into a GitHub repo and hand out keys.
 
It wouldn't hurt to put your work out there.

I'm waiting to see how rodney's project turns out. If he makes the FPGA-based memory controller for his 286 with SRAM memory and I port SQEMM to it (and finally add more features, etc) then I suppose that opens the door to some possibilities to the tech being adapted to a standalone ISA card. I think we are talking about something significantly more expensive than your typical lotech 1MB/2MB card though.

If you are looking for something that actually exists today, the intel above boards seem to be the easiest to track down and have the most info online. They are not particularly fast, but they do seem to have a lot of support.
 
If someone interested in this has experience with going through the process to get custom boards factory built with high-density surface mount (or even BGA) parts through the low-quantity assembly services offered by companies like PCBWay I think what might really facilitate a project like this would be to build a board that can be populated with 8-16MB’s worth of the really high density SRAM/PSRAM and present it as a buffered/decoded parallel bus pin header that can be piggybacked onto whatever kind of Homebrew card or motherboard you might need it for. If we could get the unit price for a module like that into the $50-100 ballpark it would make a lot of this easier. Sizewize I think you could pretty easily get onto a board about the size of an Arduino hat.
 
If someone interested in this has experience with going through the process to get custom boards factory built with high-density surface mount (or even BGA) parts through the low-quantity assembly services offered by companies like PCBWay I think what might really facilitate a project like this would be to build a board that can be populated with 8-16MB’s worth of the really high density SRAM/PSRAM and present it as a buffered/decoded parallel bus pin header that can be piggybacked onto whatever kind of Homebrew card or motherboard you might need it for. If we could get the unit price for a module like that into the $50-100 ballpark it would make a lot of this easier. Sizewize I think you could pretty easily get onto a board about the size of an Arduino hat.

Its tough to get even much volume (or interest...) in a project like this because i think a 16 bit memory card is a very niche item. . For most people a combination of a 32 bit CPU, EMM386 and SIMMs solves this problem. 8 bit people have the lotech type stuff (though no EMS backfill...) So it's just this small world of 286 users that have some desire for this.

I've debated the idea of just looking into SRAM based SIMMs to get higher speeds too. That might be useful to 386/486 people as well as late chipset 286es, and introduces 0ws memory at higher speeds to more machines. But there's going to be a lot of duplicated hardware per simm doing the address decode stuff, right? But at least, it is a thing that could get done in much more significant volume I think.

EDIT: Also, i think most of the SRAM out there is x16, which makes it more annoying for (8-bit) 30 pin SIMMs anyway...
 
My thinking is simply that a little piggyback board offering, again, 8-16MB of RAM or so and could have a jumper on it for 8 or 16 bit access would be useful for a lot of Homebrew projects that otherwise could be tinkered together at the “through-hole” level of integration. (IE, memory cards for 8/16 bit PCs, RC2014 style Z80+MMU homebrews, 65816 or 68000 machines, etc.) “Breadboard Friendly” SRAM tops out at around 512KB; even getting 4MB for a maxed lo-tech level EMS card means eight 32 pin packages and a lot of board space. A couple 8MB BGA PSRAMs integrated onto a hat with a voltage shifter built in would fill a big gap for projects that otherwise could fit on small hobby boards.

(FWIW, this would be immensely useful for a project like Rodney’s; you still need RAM for the FPGA to manage. Although if you’re going FPGA it would probably make sense to go with DRAM?)

But perhaps I’m overly optimistic on the chances of this actually being affordable.
 
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I have a 286 but the only reason I'm sticking with it over a 386 (have a board ready to go) is that I've read that the IBM PGC doesn't like faster computers and I need something era-appropriate for PGC. Otherwise it doesn't seem worth the energy to keep working when 386s work so well in comparison. Not knocking anyone determined to have a 286 but it's a frustrating era of computer to work with to me. I saw a good deal on facebook for a 286 with EGA, and my first PC was a turbo XT clone with EGA, so...

I have a V20 (NuXT), 286, and 486DX4-100 (DX3-99). It's fun to get them running but what are people using 286s for? My most nostalgic games will run on a V20, and then newer games tend to like a 386 or 486 better.

The expansion card I'd really like to see, as I've mentioned elsewhere, is a 16-bit PicoMEM style board with either a really beef FPGA and video subsystem, or Pi Zero. Something that could be basically any expansion device. In the Amiga space they use CPLDs for bus interface (PiStorm boards) rather than FPGA. A CPLD + full computer (Pi) can do almost anything while maintaining simple programmability.

I'd love to work on such a project but I have software projects in the pipeline that I'm more interested in and I have very very little experience designing circuit boards. Given such a board with a Pi Zero or Pi 4 or what have you, I'd be into working on the firmware for it though.
 
It's fun to get them running but what are people using 286s for?

Probably the same thing you are using your v20s and 486 for.

The expansion card I'd really like to see, as I've mentioned elsewhere, is a 16-bit PicoMEM style board with either a really beef FPGA and video subsystem, or Pi Zero. Something that could be basically any expansion device. In the Amiga space they use CPLDs for bus interface (PiStorm boards) rather than FPGA. A CPLD + full computer (Pi) can do almost anything while maintaining simple programmability.

VGA doesn't make sense. The complexity is high and it will certainly be a slower, less compatible VGA device than easily available $30-40 vga cards. The most typical we have seen in this realm is people making VLB versions of rare cards using pci donor chips i think. I think it would be hard for a hobbyist to beat a good early 90s vga chip.

16 bit IDE cards are also readily available with cheap adapters for SD/CF which has generally made 16 bit I/O devices not an enticing project for anyone.

Also I imagine it's annoying to make a good 16 bit card that can do the fast address decode to support 0ws?
 
Probably the same thing you are using your v20s and 486 for.
I have a 286 as well and I wouldn't use them all for the same thing. There is not much software that will only work on a 286, rather than on a V20 or a 386 or 486. It's an awkward niche. Like I said, I have one, for a specific reason that it's probably he fastest chip that will work with a PGC. Otherwise I'd 100% swap it out for a much more capable and easy to use 386 board which I have on hand.

VGA doesn't make sense. The complexity is high and it will certainly be a slower, less compatible VGA device than easily available $30-40 vga cards. The most typical we have seen in this realm is people making VLB versions of rare cards using pci donor chips i think. I think it would be hard for a hobbyist to beat a good early 90s vga chip.
Didn't mention VGA. I did mention PGC.

Also I imagine it's annoying to make a good 16 bit card that can do the fast address decode to support 0ws?
Hence CPLD?
 
In the Amiga space they use CPLDs for bus interface (PiStorm boards) rather than FPGA. A CPLD + full computer (Pi) can do almost anything while maintaining simple programmability.
Hence CPLD?

Just to be clear, the PiStorm is only able to do what it does with such simple bus glue because it’s replacing the CPU, and thus calling all the shots in terms of timing. Putting a Pi (not Pico) into an ISA slot to be a slave is a much more difficult job; even with a CPLD or FPGA to offload the bus handling to you still have a formidable issue with latencies adding up.

(The most impressive thing that I’ve seen with Pi’s being on the receiving end of externally clocked data is the RGB2HDMI, but that is unidirectional streaming, not interactive bus transactions.)
 
Just to be clear, the PiStorm is only able to do what it does with such simple bus glue because it’s replacing the CPU, and thus calling all the shots in terms of timing. Putting a Pi (not Pico) into an ISA slot to be a slave is a much more difficult job; even with a CPLD or FPGA to offload the bus handling to you still have a formidable issue with latencies adding up.

(The most impressive thing that I’ve seen with Pi’s being on the receiving end of externally clocked data is the RGB2HDMI, but that is unidirectional streaming, not interactive bus transactions.)
Really outside my knowledge. I noticed this comment re: FrankenPiFPGA:

"In an FPGA, the register map and memory map of the device being emulated can be stored in dual-port memory blocks, where it can be retrieved by logic, an order of magnitude faster than the ISA bus requires."
 
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