Rainbow 100A Memory beyond 256K?

[N. Brown]

Hi na103! I'm glad you're joining the discussion, the more the better

If you ask me, a modern re-engineering of the Rambow (lol) would be amazing. The only thing, it seems to me, that really limits the 100A is the memory size, and the only thing causing that is a scarcity of the OG solutions like the original "8087" memory expansion card. Please, go for it, and happy to help in any way!

As far as the dip switch settings on the 100B card go, na103 you indicate that switches 1-3 are used for banks 1-3 activation, whereas N. Brown earlier indicated that switch 1 was parity on/off and 2-4 were banks 1-3 on/off, if I'm understanding correctly. Is this a difference in your re-engineered card, or were there simply variations in the original designs? Do we know? I don't know if the card I'm using is the same original card as what you were using for your reverse engineering.

N.Brown -- I wouldn't mind trying out the mod you indicated: "wire the 8251 USART pin 24 the /DTR signal back into the chip that generates the INTL signal on its Data bit 5 pin" as being a simple non-destructive mod. Do you happen to know on the chip placement diagram which two chips these are? I wasn't sure (wow if we had full schematics of the 100A it would be VERY handy). I also think socketing E104 is a good plan, as also being non-destructive (If I don't mess it up lol).

N.Brown -- thank you for the huge amount of information; I'm still digesting it. What I think I'd like to try is:

1) Try to confirm the dip switch settings if we can
2) Do the 8251 mod
3) Socket E104
4) connect A16-A18 directly to the memory expansion rather than inverted
5) connect A19 if step 4 works (or perhaps even if it doesn't) -- or try just pulling it high as you suggest.
6) put everything back to stock and use na103s re-engineered solution! (which yes would be, as I said, AMAZING to have in the world).

Let me know if this seems sensible, or if I've missed something?

Cheers all! A

1) Try to confirm the dip switch settings, the NA103 card is different then in the manual I attached I attached in a previous message.
In theory of the 100B model you should bet a error message about party error checking with either the first switch 1 or the last switch. Then you might have to go through both schematics to verify which one closest matches yours.
In the list above you forgot about the IO//M signal line replacing the Shared/noshared signal at the memory expansion connector on the 100A.
If your number 4) fails try pulling A19 high, then if nothing try pulling A17 alone on the memory expansion card high. This will change the memory origination on the card.
..
On the Rb100A_component layout
IC E87 a 8251A USART chip pin 24 the DTR signal to pin 8 IC e72 a 74LS244 on the D3 input line which should outputted on pin 12 as BAD3 signal. Of course you must cut the ground signal connected to pin8 of IC e72.
This modification should be available some here on the internet, if it hasten be removed.
..
6) might be your end solution , but a couple years ago I did try to contact the author directly at github.com for the RB100A version of the memory expansion card. but never got a reply.
It was probably got marked as Spam or something like that.
..
Sorry to put you through this, but the old version of the card we where able to modify for use with the 100A and or plus models at one time, including versions that did not have the PLA on board.
A durity /hard to read copy of the RB100A schematics can be found @ http://www.bitsavers.org/pdf/dec/rainbow/MP-01491-00_PC100_Print_Set_198212.pdf
(If I you mess it up lot, please let me know as I still have 3 extra RB100A models sitting around as part units for on going maintenance contracts, since I open up my big mouth in the first place. ).
..

 

[N. Brown]

In theory some one should be able to program a PLA to replace IC E104 in the Rainbow 100A and or + models, but you will still have to do some trace changes.

 

[N. Brown]

Is my opinion that RAMbow could be an all-in-one board consisting of the memory card + 8087 adapter.
in the article it says that it was sold fully populated with nine one-megabit chips.
This creates space on board to place the CPU socket and any other logic.
At the moment I'm busy with other projects but it shouldn't be a problem to design a new board with these specifications starting from my work on the PC100 for the 100B

Ya there was some 3RD part memory expansion boards for the Rainbow 100 that did support up to 1m of ram, but most of them still had extra leads like most Univation Old products, for the Rainbow 100 computer.
Others had a Microcontroller programmed as a MMU (, like MicroWay's old ISA-bus based 1024K memory board). Byte Magazine Page 92 (PDF page 86) December of 1986 for the NumberSmasher/ECM.
..
Ya I now all about being 2 busy. To much dam client work and the business partners keep signing more contracts without expanding the RD department (staffing) or its funding correctly.

 

[alitel]

Hi there -- I got the board socketed (15 of 16 pins were co-operative lol; the ground pin was NOT). All still in working condition. I added the modification connecting pin 24 of E87 to pin 8 of E72 and cut pin 8s ground connection. Unfortunately my result was poor -- scrambled video flowing across the screen endlessly on startup. I reverted the change and the system is starting normally again. I've attached a pic of my bodge, perhaps I did something incorrectly?

I've also put together a small perfboard jig to allow me to hopefully mess around with inputs and outputs to E104 without resoldering the mainboard all the time. I will set it up and do some testing tomorrow (including the IO/M re-routing that's required). I will report back!

Cheers! A

 

[N. Brown]

Ok I looked at your INTbodge picture, being that the jumper lead was done on the bottom side. On the 20 pin IC side there could be a short.
It look like there could be 3 pinholes that are cross connected. With A multimeter in the resistance mode you can check that. (You don't want any power to the board doing this).
Something got changed/botch up with the video controller giving constant scrambled video. (Remember that the pin locations change when you look at the PCB from the bottom side).
..
I cant currently remember the website address that had the Init schematic modification for the Rainbow 100A, and I don't remember if it sated that you also needed a R100B rom socket adapter as well.
..
Doing the small perboard jip is a good ideal. Hopefully you did not have to much problem removing the E104 chip and installing a IC socket.
There was more data and manual diagnostics routines that I was going to past here today, but I can wait for your latest update.

 

[alitel]

Hi there --
OK, so yesterday I did some testing and poking around. I had built a little fixture to allow me to mess with the outputs of E104 without extensive resoldering (I've included pics as attachments -- note the appropriately rainbow cables used )

I had started by taking a look at the truth table for the 74LS138 chip used in E104 (https://www.ti.com/lit/ds/symlink/sn74ls138.pdf). It seems to me, looking at the function table (truth table) on the second page, that the outputs on pins 11-14 are not always the inverse of A16-A18 inputs on pins 1-3:

Here's an edit of that table. Y0 is "SHRAM/SMRAM" (more questions on that later), Y1 is "Bank1/A16I", Y2 is "Bank2/A15I", Y3 is "Bank3" and Y4 is "A18I". I've marked the anomalies in red.

A+ A19 IOM | A18 A17 A16 | Y0 Y1 Y2 Y3 Y4
H L L | L L H | H L H H H
H L L | L H L | H H L H H
H L L | L H H | H H H L H
H L L | H L L | H H H H L
H L L | H L H | H H H H H

So... it seems that using the outputs of E104 might be a little complicated. To avoid those shenanigans I used the fixture to bypass A16-A18 (pins 1-3) directly to Y1-Y3 (pins 14-12) which are connected to pins 47, 32 and 43 respectively on J6 ( verified earlier) which in theory are the A16-A18 signals being expected by the 100B expansion card.

Test results with 100B card: (I re-routed pin 30 on J6 to connect directly to the IOM signal on E104 pin 5 for all of these tests. I also tried all of these tests both with pin 29 grounded and with it floating, it made no apparent difference)

tl;dr -- Nothing great.

The 100B card is populated with 256k in all three banks:
1) With dip switch 4 on the 100B card set to OFF, I always got Z80 crc errors, so I'm assuming that dip switch controls parity (as per na103's documentation)
2) With dip switch 4 on and ANY other diip switch on, I got a system hang with OOOXXXX (O=on, X=off) on the leds
3) With dip switch 4 on and all other 3 off, the system booted normally to the welcome screen. On doing a self-test, it came back with a "ram option" error however.

Any observations on these results are extemely welcome!

QUESTIONS and WHATS NEXT:

1) SHRAM: Pin 15 of E104 (Y0) is labeled "SHRAM" (or "SMRAM") and is apparently "active L", yet the truth table above shows it always High, so that's something I don't understand. Further, what does it do? It is not directly connected to J6. Without that pin connected, the system ALWAYS hangs, and shows LED codes of OOOXXXX or OOOOOXO (depending on other factors) -- this happens with both the 100A memory card and the 100B. In the Technical documentation addendum on page 3-76, they talk of "NONSHRCYC" on pin 30 (I assume this means "non shared cycle"?) when an 100A card is attached, but I haven't yet found more information on this. If there is circuitry in the 100A that requires option card access to be done on a "non shared cycle" rather than using IO/M low and the concept doesn't exist on the 100B card, then are we hosed? Anyway, this I don't fully understand.

2) A19: N.Brown shared a document showing a possible issue on the 100B card with A19 being pulled high and causing an illegal memory addess access when used on a 100A (I have attached the doc to this thread, I hope that's ok?)
I will look into this today or tomorrow (got some spring chores to do ). I will see if I can mod the card to force A19 low and see if that makes a difference.

3) The "memory hole": As na103 points out, the 100B card is likely designed to provide memory starting at 0x20000, leaving us a 64k "hole" -- perhaps the 100A is doing a memory scan and just always barfs when it hits that hole? I don't yet understand what the fix indicate on the document N.Brown provided (the N2 diode) does (please see attachment to this post), but perhaps that is necessary as a workaround.

Given how little the fiddling about with outputs from E104 and the dip switches on the 100B card changed the behavior of the system, it FEELS to me like we're missing the main problem, so it may be the A19 issue or the memory hole issue (or, worst case, the "SHRAM" issue which is still a complete black hole to me).

I do feel a bit out of my depth on this, a bit flailing in the dark, so may have to leave this prjoect for deeper thinkers eventually

Cheers! A

PS -- with respect to the earlier bodge I did on chip E87-E72, I apologize, the photo I provided made it look like there was a shorted connection, but it was the camera angle. There was no connection other than what was supposed to be there

 

[N. Brown]

With you truth table for the 74LS138 chip used in E104, I would of liked that you entered the hole table in stead of part of it.
Hopefully this abbreviation does not give us back to much feed back (,or comments about short cutting IC specs).
Anyways I will now carry on with the rest of it.
..
Well this reply might be a slightly different order then the reader is inspection to read.
..
Since the Ic E104 now has a socket you could try a 74LS238 in it. This is another 3 to 8 decoder but has a none inverted output. In this case it would output same logic levels as the B model IC E92
with A16, A17,A18 being active hi. As this is what the B series memory expansion is expecting except we have to deal with the IO//M, A19 and Memory adapter present signals.
..
The missing memory bank test with the 100B would be easy to do, to see the results with the systems firmware based diagnostics finding a hole in memory just above the first 64K bank.
In theory on the B model IC numbers E123, E124, E141, E139, E142 E143, E144 are bank1 in the 64K to 131071 address range. They are disabled at pin 4 with the /RAS signal only.
By temporary pulling this pin high (aka a logic "1") this bank should be disabled. And we can check its result.
..
Sone other computers will bark that the bank is not available and will continue with its boot sequences when they are set for more memory then 128K.
(By the way I don't have a B series or a spare B series memory board to do testing here at my end. Only 3 model A with likely a 64K memory expansion board in storage).
If the Memory expansion Card for the model B series had a 4 unused bank of memory this would have made a bank relocation a lot easier to do, in theory. (some 3Rd party board do have a 4 bank).
With the spacing between logic boards, it would hard to double stack a block of DRAM to accomplish another new memory bank. (in a old IBM style arrangement).

The "memory hole
So if the memory expansion card for the B model(/series) omitted the memory addressing form 64K to 131071 address range and the none 100B models needs this memory block, then we have to
relocate a bank for it. To help stop Sinclair ZX81 like computer ghost/phantom memory form occurring it is best to use a block of memory that is not in the middle of the memory expansion cards
addressing range.
..
The N2 diode is a workaround for the memory hole, but it would have been better to use 128K dram chips in bank 3. This way there would have been less Ghost/phantom memory block to deal with.
On most old 3 RD party memory expansion board when you are using MS-DOS with the 100A or + models you must install a driver with the memory size stated. So with this kind of driver it easy to
just subtract the amount of ghost memory from it for the right memory size available and in theory get no error messages. (This is untested procedure).
..
SHRAM: Pin 15 of E104 (Y0) is labeled "SHRAM" (or "SMRAM") on the 100A and + Models.
The shared memory and none shared memory on this computer system, to explain it simply. ( I try to do it simply).
The rainbow 100 computer is dual processor system that uses a common area of memory between both processors, but both microprocessors need a private area of memory for proper operation of the computer.
When running the MS-DOS operating system the Z80 microprocessor is mostly a floppy disk controller. So in this mode the private memory normally called unshared is where the Intel microprocessor keeps its
interrupt table variables. This is located at the bottom 2K of the memory bank 0 on the Rainbow 100 computer. The Z80 microprocessor has its own private memory. (Which we will leave its details out
for now).
..
Most old IO cards that use the memory expansion bus for the 100A and or plus models also use this control signal. To acknowledge a Intel I/O Code Access, Intel like CS code segments access to firmware access and other
functions like that. The 100B left this signal there for compatible reasons but like the model A and/or + models still left the IO//M signal omitted from a signal use pin on the memory expansion bus.
There is a lot more I could manually entered about this memory use, but for now the part that was entered should be of some help.
..
A19 address issue.
The schematics for the 100B Memory expansion card have a resistor that ties it to +5v dc, so if the resistance is to low this will pull A19 to a high state.
On my older schematics for the 100B memory expansion card there is some differences. This resistor is not in a resistor pack but is a separate unit.
On the 100A and or + models the computer grounds this pin at the memory expansion connector, at least according to the old schematics set for it.
..
Hopefully there is to many type o's. here.
I have found some differences in some of the DEC Rainbow 100 documentation depending on their print dates as well. (likely related to type o's and maybe some undocumented design changes ?)
Some of the signal lines have both a pull up resistor then another Pull down resistor else ware in the unit circuity but we are not dealing with ECL, TTY or 8 volt logic devices.

 

[alitel]

Apologies -- I've attached the datasheet here, with the entire truth table. (What I provided was an excerpt of the most relevant rows, with the headings modified to describe our use case)

Thank you for the shared memory explanation -- I didn't realize that this is what was being talked about (I recall reading about it, but hadn't put it in context). Looking at the full truth table for the 74ls138, I'm not sure how Y0 (the shared ram signal) is actually used -- it is only Low in one specific case, when IO/M is low and A16-A18 are also low (indicating a memory access somewhere in the first 64k of memory)??

ANYWAY, I will take a look at the A19 circuit on my card tomorrow and report back. In terms of the "memory hole", I'm not sure there's a simple way to test any ways of working around that?

Cheers! Alison

 

[N. Brown]

I may have to go through the schematics form NA103 and find any unused gates then come up with a solution for missing bank issue by modifying the upper most memory bank with those unused gates.
With the spacing between logic boards, it would hard to double stack a block of DRAM to accomplish another new memory bank. (old IBM style arrangement).
..
Trying to find time to do that ? or the time to find and dig out some old 512K memory expansion board planes for the model A and + model ? but these would not have the PCB Board images.

Apologies -- I've attached the datasheet here, with the entire truth table. (What I provided was an excerpt of the most relevant rows, with the headings modified to describe our use case)

Thank you for the shared memory explanation -- I didn't realize that this is what was being talked about (I recall reading about it, but hadn't put it in context). Looking at the full truth table for the 74ls138, I'm not sure how Y0 (the shared ram signal) is actually used -- it is only Low in one specific case, when IO/M is low and A16-A18 are also low (indicating a memory access somewhere in the first 64k of memory)??

ANYWAY, I will take a look at the A19 circuit on my card tomorrow and report back. In terms of the "memory hole", I'm not sure there's a simple way to test any ways of working around that?

Cheers! Alison

That's Ok, I just added a bit about it to help stop us from getting feed back about aberrating it.
..
The Y0 (the shared ram signal) is used to generate the memory select signal for the base memory in the model 100A and or plus models.
But the Y1 signal output pin on the model B controls access to the second memory bank. The 64K to 131071 memory region. On the 100B this is a different IC number, I think it is E107 on the 100B schematics.
..
On my 3:11pm reply today I did note how to test the (A) memory hole at 64k to 131071 on the 100B models, to see how the system will respond to it. (no big deal)
On the 100A and or plus models with the 100a memory expansion unit it will be the same address line to the memory expansion unit. the A16I we have to pull low, and see what the computer responds back with
when it is rebooted of course. (Please note that this entry has been reentered in another (direct) message- so don't worry if you see a duplicate like entry on it)

 

[alitel]

Hi there -- I gave the A19 "being maybe pulled high" issue a try yesterday by grounding out the A19 pin on the card connector to force it low, but it made no difference.

So.... at this point, I'm going to take a pause on trying things -- I'm really not sure where the issue lies and I'm just faffing around. N. Brown, we can continue discussions if you'd like me to send you the 100B card to work on, and happy to collaborate on any designs you'd like to try out, if you have time/space going forward! I still firmly feel that a modern re-engineering of the "Rambow" or eqivalent would be great to have, allowing all those poor 100As out there to function as full rainbows.

In general, I'm very happy to help out in any limited way I can with anyone who wants to pursue this. I think we've gathered some data here, thanks very much to N.Brown providing so much good information. I'm attaching the full schematics of the 100A (tho they are blurry and not of the best quality) here -- N.Brown, you provided them as a link from bitsavers.org, but I think that was in a different thread. So here they are.

Best, A

 

[N. Brown]

There has been some changes in the DEC. Rainbow 100 documentation
> In my old documentation pre 1984 for the Memory expansion boards are different then what is in newer documentation. (? could be a print error And or other PCB Logic Change)
The April 08 message had the file attached "DECRB100_MemoryTestDOC.Pdf" had the Title of Appendix B unit page 133 file. but on page 141 there is 3 different memory configurations with the same switch settings.
In this version Dipswitches 1 and 4 are a reversed position. (? Print error and or PCB board changes.)
> The RB100B Memory expansion board schematic is a little different then my older documentation version.
My old documentation shows Pin 12 and 14 on IC E7 being tied to other logic devices and not Grounded and pin 9 of it is reserved for STK4 signal.
When I get enough free/spare time, I will go through the 100B memory expansion card schematics and see what free logic gates are still unused.
..
The Tuesday 7:56 Pm message with the Attachment titled " Modfy Int Vector 100A.png" is for a different 3Rd parity modified Firmware ROM Set. After I checked the wiring diagram, but there is no link for the firmware for it.
Watch out if you download this one from the Dark Web. It changes the Interrupt vector to another address that is different then then on both Rainbow models.
..

 

[N. Brown]

I guest I should of keep my mouth shut /fingers of the keyboard on this subject. The modification of a 100B memory card for use in a 100A computer.
In theory even if the newer firmware in the Memory block decoded chip had omitted the the Address Block for signal pin 9 we still should of be able to force
a block on memory back to the 64K to 131072 region of memory. By directly hotwiring a bank by manually manipulation the bank selection logic addressing.
..
With IC E104 on the Rainbow 100A getting socketed this allows for a 74LS238 to be instead.
The 74LS238 has a none inverted output, but wee still must connect its A18 output back to the memory expansion bus connector. Replace the memory expansion
Shared/NotShared signal with the IO/M signal that the 100B Boards what. Pull the 100A memory option Present signal to the correct level for the 100A models.
Reconnect A19 back to the memory expansion connector and disconnect that signal pin from the ground signal. Disconnect A19 from IC E104 pin 4.
== Could try to make the E104 chip to be always active by connecting its pin 6 to GND, but the input trace to it should be cut as this has the IO//M signal on it, but
== then for testing this would likely make little difference ,but the system could now also overlay signals onto A16, A17 A18 on I/O operations as well.
..
Get a memory bank to work from 10000 to 20000 hex.
Even by piggybacking 9 of the 4164 memory chips over a existing memory banks 256K DRAM chips with similar pinouts then hotwire the upper chips /RAS signal
by running it to our hotwire address selection. (In a fashion like Old IBM style Double Stack (dual laver) DRAM chips). I leave the old 128K DRAM chips omitted in
this message for now. (, As trying to get the ones that are similar in pinout too the 256k Drams are hard and expensive to get now days).
..
This should of worked and use to work with older versions of the 100B memory expansions boards, but didn't in our new case.
We could also manually wire the Share/NoShare signal onto the memory card control logic. (but we aren't getting to that point either with not much luck in this prosses).
Maybe the host system in this case has other undocumented changes onboard that to also be dealt with. (I doubt it in this case).
.
I am not to sure how many manual Address line manucaption combinations where tried either.
The older Perssyt. Inc. 512k memory expansion card for the 100A needs a pin modified on IC E104 to work with 512K. The A18 signal must be reconnected back to
the memory Expansion card Connector pin for it. With how thinks are progressing I don't know if I should restore its documentation out or archive or not.
Other 3Rd party higher capacity memory cards need other wire leads run to various other logic chips in the 100A models in order to work. (To even bother with them ?)
I do have other Rainbow 100A memory expansion cards documentation in a archive, but most on them have some sort of PLA involved in the memory Block Address
decoding, so whos got a PLA programmer and whos going to patch their coding? If we go that way.

..

 

[na103]

I don't want to create false expectations, I'm working on it.
at the moment I have modified the board with nine 1Mbit DRAM and removed all the bank switch logic no longer necessary.
as you can see there is room for 8088 and other logic.



thanks to N.Brown's images I'm trying to understand how the 8087 adapter works.
I seem to see that the E92 multiplexer and bufferd A19 present on the 100B board are also present on the 8087 adapter.



also this picture where you see the 8087 adapter without FPU, populated with only the logic necessary to connect the rev B memory expansion seems to confirm my theory.


Finally maybe an old DEC seller here in Italy, friend of a friend, might have an 8087 adapter where I can do the reverse engineering.
that's all for now.

 

[N. Brown]

I don't want to create false expectations, I'm working on it.
at the moment I have modified the board with nine 1Mbit DRAM and removed all the bank switch logic no longer necessary.
as you can see there is room for 8088 and other logic.

View attachment 1278021

thanks to N.Brown's images I'm trying to understand how the 8087 adapter works.
I seem to see that the E92 multiplexer and bufferd A19 present on the 100B board are also present on the 8087 adapter.
View attachment 1278022
View attachment 1278023

also this picture where you see the 8087 adapter without FPU, populated with only the logic necessary to connect the rev B memory expansion seems to confirm my theory.
View attachment 1278024

Finally maybe an old DEC seller here in Italy, friend of a friend, might have an 8087 adapter where I can do the reverse engineering.
that's all for now.

Right on a replacement for the old Rainbow 100 Memory with a future 8087 adapter on board is under redevelopment with 1M of DRAM onboard.
..
Ya, the easiest to understand the 8087 Numeric processor part of this board is to reverse engineer one, as far as identify the unpopulated IC's a good quality picture
of a complete board with the IC install will more or less answer that question. This would be a lot easier than pulling the 8087 Numerical Coprocessor test routeteens
out of the Rainbows 100 diagnostic disk. Then dissembler the routeteens for the programming information.
..
In some ways this board 8087 Numerical Coprocessor interface is similar to others for the none IBM standard PC 8087 interface circuity.
There would be circuity to overlay the coprocessor and its hardware detection circuit into the Rainbow 100 peripheral map. That why it is more complex then some
other systems use of the 8087 NPU chip. I have attached a generic 8087 NPU Interface article that will also work with none Intel 8088 microprocessors as well.
..
On most none IBM PC clone models we use to use a circuit that is similar to the one from the old "The Computer Journal "Issue 03 Nov 1983's newsletter.
As this interface will work with none Intel microprocessors as well. The one for the rainbow 100 computer from DEC was similar but is more complex as it had a register
for a couple of the 8087 NPU's status signals that the IBM PC did not use within a status register. The other main difference is that DEC. did not use the Intel 8288 bus controller,
No did we. (There are standard 74LSxxx part that can do the same job on this board that was a lot cheaper then the I8288 chip).
..
So this redevelopment of this board may take some time to complete do to its secrets.
Sorry but I haven't work with any RB100 computers hardware for quite a flew years now.
All of the Rainbow 100 stuff and data for them was archived (, onto a data tape) and I am not to sure about any NDA's on my end that could come into effect (with the disclosing of them).
..
There where 3 other 8087 NPU interfaces for the Heath Kit Zenith Z-100 Computer system, but trying to find there schematics and PLA code will be a issue, So I can not really point to that
as a quick temporary replacement to it.
..
Hopefully you include a 8088 kitty chip socket on your finished version, so none RAINBOW 100 computers could also use this module.
If you have a PCB Photo imaging software, then you already have half of the board schematic anyways, If not I know what that will take to re produce it.
..
Happy work ahead until your next forum update.

 

[N. Brown]

I have attached the enhanced intel 8087 Dos interrupt circuit that a lot of the 80X88/86 based Unix/Dos Box hybrids use.
The clone board for the DEC. Rainbow also have the extra 8087 NPU status bits connected to a register.
Unformal I don't remember their address or the bit order either.
But anyways I though I would attach it to this message, to help cut the search time down if someone had to look for it.
That's all

 

[N. Brown]

1) Try to confirm the dip switch settings, the NA103 card is different then in the manual I attached I attached in a previous message.
In theory of the 100B model you should bet a error message about party error checking with either the first switch 1 or the last switch. Then you might have to go through both schematics to verify which one closest matches yours.
In the list above you forgot about the IO//M signal line replacing the Shared/noshared signal at the memory expansion connector on the 100A.
If your number 4) fails try pulling A19 high, then if nothing try pulling A17 alone on the memory expansion card high. This will change the memory origination on the card.
..
On the Rb100A_component layout
IC E87 a 8251A USART chip pin 24 the DTR signal to pin 8 IC e72 a 74LS244 on the D3 input line which should outputted on pin 12 as BAD3 signal. Of course you must cut the ground signal connected to pin8 of IC e72.
This modification should be available some here on the internet, if it hasten be removed.
..
6) might be your end solution , but a couple years ago I did try to contact the author directly at github.com for the RB100A version of the memory expansion card. but never got a reply.
It was probably got marked as Spam or something like that.
..
Sorry to put you through this, but the old version of the card we where able to modify for use with the 100A and or plus models at one time, including versions that did not have the PLA on board.
A durity /hard to read copy of the RB100A schematics can be found @ http://www.bitsavers.org/pdf/dec/rainbow/MP-01491-00_PC100_Print_Set_198212.pdf
(If I you mess it up lot, please let me know as I still have 3 extra RB100A models sitting around as part units for on going maintenance contracts, since I open up my big mouth in the first place. ).
..

This Modified Interrupt vector Schematic needs a custom replacement firmware in order to work.
It is not the same as the 100A to 100B adaption that uses a ROM chip overlay. A DarkWeb online version

 

[N. Brown]

I have attached the Intel x86 and/or x88 minimum mode Hold and Hold Ack to RQ and GR conversion Circuit.
This circuit some 3 rd party used to help attached the 8087 NPU to a 8085 and other microprocessors.
My-Issues_wAdda8087 has the hidden Microprocessor bus Status Cycles that most documentation leaves omitted.
Translate Hold into AEN Signal for Max Mode X88 and X86 Microprocessor also has the explanation of the microprocessors
Shared bus RT/GT signals work under section 2.2 on page 2 if they are needed.
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Not Attached is a S1 and S2 to ALE strobe generator circuit.

 

[na103]

it seems that before the multiplexer E27 the address lines (A16 - A19) were probably modified to overcome the memory gap problem by going from rev A to rev B.
the address lines are reversed after the latch E32 and then passed through a full adder E29.
I'm not yet clear how the latter changes the addressing, but I think the result is to make the memory from address $10000 to $1FFFF usable.

 

[na103]

however this does not matter for RAMbow.
I can eliminate E29 and manage the addressing with a GAL logic and a jumper to set when RAMbow is installed on 100A or 100B.
The E27 multiplexer is also useless as it is only needed if you intend to use the 100A's memory card on the 100B.
There's probably no point in using RAMbow on the 100B when you can use its memory card.
Anyway this is the outline of what I think RAMbow might look like.
I'm waiting for some of your comments and suggestions.
Thank you

 

[N. Brown]

Ideally I would make the Memory expansion board work with both models with just one jumper.
(Some newer 3RD party IO board for this machine that use the memory expansion have the jumper for that purpose).
On the memory expansion card pin 29 Memory Option Present is pulled low with a 100A memory expansion card, so
these cards with a jumper marked 100A only pulls this signal to ground.
They normally have some logic gates tied into this signal line that will disable the memory address 0 to 65534 on a
100A and on the 100B memory addresses from 0 to 131071.
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They use the Refresh Row Address Strobe RFSH RAS H and the Column Address Strobe CAS88 H with the
shared/Noneshared signal line to generate a onboard IO//M signal.
The memory expansion connector pin 31 the Do Refresh DO RFSH L is inverted and tied onto the onboard IO//M signal.
On 3Rd party IO boards that have Ghost DMA support also use this signal as well.
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The big issues is that I need to be able disable the bank of memory form D0000 to DFFFF hex 851968 dec. to 917503 dec.
for EMS board use. This memory bake should also be disabled during IO code or IO data segments access as well.
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In order to use the memory block form E0000 to EFFF in Hex would that some additional logic to do that.
>The None Volatile Memory block is controlled by Diagnostic Write Register (8088) located at 0AH
Bit 6 When high (1), allows data to be written into the NVM.
Bit 7 When high (1), this bit allows data to be recalled (read) from the NVM.
Sorry I don't member what Microprocessor Segment Codes it used.
> The onboard Video memory.
Diagnostic Write Register (8088) located at 0AH data bit 1 When this bit is low (0), the computer will blank the display.
Board that let you use this block on memory on the 100A normally have a lead wire that runs to pin 8 of IC E48 a 74Ls32
that is ties into some logic that connected with the Unshared signal.
Sorry I don't member what Microprocessor Segment Code it used for the video memory either.
..
With the first versions it might be easier to disable the last 256K of upper memory addressing when using the Rainbow 100
memory expansion bus or the microprocessor socket, But having a kitty chip socket for the 8088 would allow easier decoding of the memory blocks above
Dxxxx to FXXXX range without the cable that goes back to the original 8088 microprocessor.
This would also allow the Memory expansion Bus to remain free for other purposes.
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Several external expansion units for the Rainbow 100 either use a Kitty chip with the 8088 microprocessor directly or use the
memory expansion bus and some extra wire leads for the signal that they require, which are not on the memory expansion
bus connector.
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The external 3rd party LabBus and or ISA bus adapter have logic onboard to detect IBMPC compatible access or Dec. compatible
Access on address over the 640K range. Yes they are decoding the Microprocessor Code Segment selection as well.
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For a Ideal how a 8-bit ISA bus 1MB-Ram board without MMU works see :

https://www.lo-tech.co.uk/w/images/a/a2/Lo-tech-1MB-RAM-Board-schematic-r02.png

(The full address space is not available without a MMU and proper Intel Microprocessor Code Segment detection)
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For a Ideal how a 8-bit ISA bus 1MB-Ram board with MMU works see :

https://www.lo-tech.co.uk/w/images/f/fd/2MB-EMS-Board-r02-schematic.png

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For a more limited IBM PCXT memory expansion card MicroRAM 640k umb-ram for 8-bit ISA bus

MicroRAM - 640K + UMB RAM - 8-bit ISA

8-bit ISA card that fills any 8088 PC to the max, and then some! This updated version can be plugged onto Monotech XT-IDE Deluxe v1.1 cards, combining the two to save an ISA slot - useful for machines with a limited number of ISA slots such as IBM 5150. Supports machines with zero RAM. Supports...

monotech.fwscart.com