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Cbm 2001 Pet strange boot

I suspect... and it is only a guess... that in the TTL case the pull-up is to limit in-rush current when the gate is powered up.
 
Nivag Swerdna said:
I suspect... and it is only a guess... that in the TTL case the pull-up is to limit in-rush current when the gate is powered up.
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That would help answer the question of why, with TTL, pull up resistors were used , rather than connecting the inputs directly to +5V. In cmos systems, they just get tied directly to the supply. Though I do have a number of TTL circuits where the gate and say counter load data was connected to 5V directly but it was not as common as using the resistor.
 
Start on page 6, "Unused inputs".


It's a precaution in case VCC exceeds or has spikes bringing it greater than 5.5V, the voltage at which the B-E junctions of TTL inputs Zener.

Incidentally, this only applied to the old TTL stuff such as the original 74 series where the "Absolute maximum" ratings for the power supply and the input pins were 7V and 5.5V respecitvely. For the 74LS series, the maximum input voltage rating increased to that of the supply (now both 7V), so it is perfectly safe to connect unused 74LS inputs directly to +5V. The 74LS series replaced the transistors at the inputs with schottkey diodes. I guess the technique persisted with LS devices due to old habits not dying easily.
 
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Nivag Swerdna said:
so that suggests perhaps a poor contacts and trace between G3 p19 and F4 p10
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I have continuity across G3 PIN9 and F4 PIN10 and in the two pins i have low signal ;)


Nivag Swerdna said:
Maybe de-oxit and wiggle G3 and F4? Check pins of G3 and F4 are happily in their sockets... especially if you fiddled with F4 earlier. ;)
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They aren't in socket but soldered on board!

G3

PIN18: pulse
PIN19: low
 
Can you post all the pins of G3 please?

G3 p19 LO seems wrong to me, especially if G3 p18 is alive and kicking
 
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G3

pin1: low
pin2: pulse
pin3: pulse
pin4: pulse
pin5: pulse
pin6: pulse
pin7: pulse
pin8: pulse
pin9: pulse
pin10: low
pin11: pulse
pin12: pulse
pin13: pulse
pin14: pulse
pin15: pulse
pin16: pulse
pin17: pulse
pin18: pulse
pin19: low
pin20: high
Quote Reply
 
Well... that all looks OK except for p19 which IMHO should reflect p18 i.e. be pulsing.

I think it's worth a 2nd opinion but I would be tempted to replace G3.... although I don't think I have ever seen a single output failure like that before... that being said... flip flops do die. I guess it could be the other end pulling it low?

I guess you could remove G3, socket it, replace with a new one and if pin 19 stays low... lift the leg and see if it pulses.
 
Nivag Swerdna said:
Well... that all looks OK except for p19 which IMHO should reflect p18 i.e. be pulsing.

I think it's worth a 2nd opinion but I would be tempted to replace G3.... although I don't think I have ever seen a single output failure like that before... that being said... flip flops do die. I guess it could be the other end pulling it low?

I guess you could remove G3, socket it, replace with a new one and if pin 19 stays low... lift the leg and see if it pulses.
Click to expand...
Thanks Nivag, ok tomorrow i'll try to carefully remove G3 and i'll sold a socket ;)
 
The question often comes up when a line is stuck high or low, whether it is the output stage of the IC driving the line that is stuck, or the line being pulled high or low by a defective input. It is almost always the former, because the circuitry at the IC's input is such that it seldom it can fail in a way where there is a very low resistance pathway to +3V , +5V or gnd. One way to find out though, it simply to solder suck just the one suspect defective pin on the IC output and free the pin up in the hole, so it disconnects and can be tested. This avoids having to remove the whole IC which can be more stress on the pcb and might not be necessary.
 
Piggybacking a signal that is high or floating should work OK. Piggybacking a signal that is stuck LOW is unlikely to work.

TTL logic has an internal pull-up resistor and a transistor to pull the signal line LOW.

For a signal to be LOW, it means that the output transistor has to be switched ON (conducting).

If you put a working device in parallel with a faulty device (with an output that is ON - conducting) then the result will always be LOW (i.e. the working device can never pull the signal voltage high due to the conducting transistor in the faulty device).

Only in a very (very) small number of cases could this work. If the transistor is partially conducting - then the voltage may be sufficiently LOW for the logic (and logic probe) to indicate a LOW condition - but putting an operational chip in parallel may just be enough to 'lift' the voltage up (due to the presence of two (2) pull-up resistors). However, I wouldn't bet on this outcome though...

Dave
 
Hugo Holden said:
The question often comes up when a line is stuck high or low, whether it is the output stage of the IC driving the line that is stuck, or the line being pulled high or low by a defective input. It is almost always the former, because the circuitry at the IC's input is such that it seldom it can fail in a way where there is a very low resistance pathway to +3V , +5V or gnd. One way to find out though, it simply to solder suck just the one suspect defective pin on the IC output and free the pin up in the hole, so it disconnects and can be tested. This avoids having to remove the whole IC which can be more stress on the pcb and might not be necessary.
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Ok so need i unsold pin19?? Thanks
 
daver2 said:
Piggybacking a signal that is high or floating should work OK. Piggybacking a signal that is stuck LOW is unlikely to work.

TTL logic has an internal pull-up resistor and a transistor to pull the signal line LOW.

For a signal to be LOW, it means that the output transistor has to be switched ON (conducting).

If you put a working device in parallel with a faulty device (with an output that is ON - conducting) then the result will always be LOW (i.e. the working device can never pull the signal voltage high due to the conducting transistor in the faulty device).

Only in a very (very) small number of cases could this work. If the transistor is partially conducting - then the voltage may be sufficiently LOW for the logic (and logic probe) to indicate a LOW condition - but putting an operational chip in parallel may just be enough to 'lift' the voltage up (due to the presence of two (2) pull-up resistors). However, I wouldn't bet on this outcome though...

Dave
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Hi Dave, welcome back!
Yes i usually piggyback only ic rams!
 
I removed G3 and i inserted a socket but at the moment i don't have any ls373 spare....
 
Update!

I founded an LS373 on old Amiga s' board, i unsolded and i inserted on G3...Pin19 now pulse!
Now i have full screen random chars! Good job Nivag, thanks!
Tomorrow i try with pettester for next step :)
 
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