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Commodore CBM 2001-16N - BIG MESS!

So, i did the measurements again. This time more precisely. Please see attached photos i have taken. Unfortunately i was not able to get the whole sweep on the screen. I used the SWP VAR Knob to zoom out as much as possible. To show you the full picture there is a part 1 (sweep starting on the left edge) and part 2 (you see the end of the sweep)
Indeed, the chopped configuration worked for me best.

Channel 1 is placed on the top half of the screen, right at the scale.
Channel 2 is placed on the bottom half of the screen, right at the scale

Measurement #1 (CH1:B3-9 and CH2:A5-13) gives me 2 square waves.
Measurement #2 (CH1:B3-9 and CH2:A5-8 gives me only 1 square wave on the top. Whatever i tried - on Channel 2 i only get a flat line. I guess this confirms that the Video RAM is not being written on?

Scope CH1_B3-9_CH2_A5-13 part1.jpg
Scope CH1_B3-9_CH2_A5-13 part2.jpg
Scope CH1_B3-9_CH2_A5-8 part1.jpg
Scope CH1_B3-9_CH2_A5-8 part2.jpg
 
The first picture shows what I expect to see with channel 2 on A5-13, coming from F1-6. Don't expect the processor running to look like the NOP generator. It is under software control.
It would be good to know what the other scope shot conditions were?
As for triggering, sometime it helps to trigger on a faster signal, like A7 or A8. Your sweep frequency was faster than I thought you should be using.
I find it interesting that the scope does look to have a DC or AC trigger selection. This might be why the slow speed triggers are hard to get working. It may use an AC trigger.
You'll most likely want to invest in at least one 10X probe. There are cases where the loading of a 1X probe will cause problems in analog circuit, such as the video. For most of the digital a 1X is fine.
You should be able to see the 1MHz clock on the processor pins with the scope.
Dwight

Ops just reread your post. The ground wire attached to A5-9 would kill the signal to A5-8. It should not be there. It was likely there when it was using the external video board.
The signal on A5-8 was a high. You describe it as a flat line, easily confused with a 0 level.
Dwight
 
Last edited:
Hello Dwight,

i got 2 probes bundled with the scope. Both can be changed to 10x by a switch at the probe. But this only changes the Voltage reading, correct? I did play with it a bit but did not catch up the sweep better. When i further decrease the Time/DIV i only see a dot flying on the screen. I found the current setting with 5ms the best for shooting a photo.

The signal on A5-8 was high, you are right! And after i cut the junmper (again) i now get a good signal. Looks revers compare to the A5-13. Is this what you expected to see?

And yes, i measured exactly 1 microsecond at 4,5 VDC at the CPU Clock out (39)

Scope CH1_B3-9_CH2_A5-8 (JP cut) part1.jpg
Scope CH1_B3-9_CH2_A5-8 (JP cut) part2.jpg
CPU clock out Pin39.jpg
 
Yes, it is what is expected. With the other video board, if it used the same address, you'd not want the onboard RAM to get onto the bus. With the wire jumpered, The onboard RAM can't be read.
In any case, it looks like there is no issue with the address decoding. The only part we didn't see was the signal going to A5-11 and A5-2 used to cause a write to the RAM A5-8 would cause the RAM to read.
The write signal is possibly missing but we are more likely looking at an issue with the code in the ROMs or that the processor isn't running somehow. Since the NOP generator is working it is more likely a problem with the code in the ROMs.
Do notice I use the words likely. We just went down 3 levels of likely. Some riskiness in assuming a ROM failure but I'm somewhat confident that looking there would not be a waste of time.
Can you program 2732s? and can you read 6332s?
Dwight
 
Dwight Elvey said:
Yes, it is what is expected. With the other video board, if it used the same address, you'd not want the onboard RAM to get onto the bus. With the wire jumpered, The onboard RAM can't be read.
In any case, it looks like there is no issue with the address decoding. The only part we didn't see was the signal going to A5-11 and A5-2 used to cause a write to the RAM A5-8 would cause the RAM to read.
The write signal is possibly missing but we are more likely looking at an issue with the code in the ROMs or that the processor isn't running somehow. Since the NOP generator is working it is more likely a problem with the code in the ROMs.
Do notice I use the words likely. We just went down 3 levels of likely. Some riskiness in assuming a ROM failure but I'm somewhat confident that looking there would not be a waste of time.
Can you program 2732s? and can you read 6332s?
Dwight
Click to expand...

ok, great. So, i can move on to look somewhere else :D

When i started troubleshooting this CBM i also looked deepy into the ROMs. The unit did not came with the original ROMs but with 2716s and 2732 EPROMs. The 2732s are using the adapter socket. I checked continuity on all units (except F10) and found a bad socket F8 which i already replaced.
I bought a USB GQ-4x4 programmer and some new EPROMs. So, i was able to download the SW from all EPROMs and installed new EPROMs with the BASIC 4.0 Software from zimmers.net (901465-23, 901465-20, 901465-21, 901447-29, 901465-22 and last week also 901447-10).
From my point of view the ROMs should not cause the problem. At least i would expect anything on the screen when using the Pet Tester. I already used the Pettester by David for the EDIT D8 and also the Pettester1 and 2 for D9. Always the same result - no change at the screen at all. Please see my initial post where i noted all these initial steps i did.


What are your thoughts about the Data Bus Receivers? Could there be a conflict when connecting the CPU Data Bus?
I watched the interesting troubleshooting Video from Frank: https://youtu.be/K9QTPhSdhJY

The symptoms are similiar. The type of pattern on the screen is pretty much the same and stays when i remove the CPU.
I have checked E8 and E7 with my logic probe. There is some activity at E8 SD0 - SD3 but nothing on BD0-BD03. There is almost no communication at the E7 pins. I did not check with the scope yet - got a busy day today....
 
I guess the next thing might be to start looking at the data bus right after reset. I might have some suggestions when I've had a chance to look at the schematics a little longer.
Dwight
 
You say that removing the A5-9 jumper gave a signal on A5-8 but when I asked whether removing it made any difference you said "I did not see any difference yet when i cut that jumper."

So, does that mean that the scope signal on pin 8 changes but the screen remains the same?

Did you check for continuity of the data signals between F10 and E11?
 
There is another thing to check before moving on.
If you put your NOP generator back in there are a number of experiments we can run.
First is to look at pin 20 of each EPROM. We should see a short negative pulse every full address cycle ( by short, I mean 1/16th of an address cycle ).
Next, since you have an EPROM programmer, we can create an EPROM with a checkboard pattern. With that we can test the data path bus buffers. If you don't know how to create the file for the check board, I can help there. ( I'll get you started and you can finish it with something like notepad ).
Dwight
 
MikeS said:
You say that removing the A5-9 jumper gave a signal on A5-8 but when I asked whether removing it made any difference you said "I did not see any difference yet when i cut that jumper."

So, does that mean that the scope signal on pin 8 changes but the screen remains the same?

Did you check for continuity of the data signals between F10 and E11?
Click to expand...

Hi Mike, yes exactly. I did not notice any change on the screen nor the scope - but at that time i was still measuring noise. :D
Meanwhile i checked continuity between F10 and E11 - all lines are good.

@Dwight - yes, i can see a very short negative pulse on pin 20 on all ROM´s. It´s a 23ms sweep at 3,8 VDC
Unfortunately i have no idea how to program the checkboard pattern i would need your help for that.
 
I've made a file 4K bytes in size. It is in Intel HEX format.
See:
https://en.wikipedia.org/wiki/Intel_HEX
Cut and paste it into a file called 55AA.HEX
Program it into whatever EPROM you are using 2716 or 2732
Dwight

Code: 
:1000000055AA55AA55AA55AA55AA55AA55AA55AAF8
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:100F600055AA55AA55AA55AA55AA55AA55AA55AAA9
:100F700055AA55AA55AA55AA55AA55AA55AA55AA99
:100F800055AA55AA55AA55AA55AA55AA55AA55AA89
:100F900055AA55AA55AA55AA55AA55AA55AA55AA79
:100FA00055AA55AA55AA55AA55AA55AA55AA55AA69
:100FB00055AA55AA55AA55AA55AA55AA55AA55AA59
:100FC00055AA55AA55AA55AA55AA55AA55AA55AA49
:100FD00055AA55AA55AA55AA55AA55AA55AA55AA39
:100FE00055AA55AA55AA55AA55AA55AA55AA55AA29
:100FF00055AA55AA55AA55AA55AA55AA55AA55AA19
[endcode]
 
Use pin 20 of the EPROM you have in there, as the trigger for the scope.
Once you have that in there you should be able to see a nice burst of, full sized, square waves on pins 26 through 33 of the 6502's socket( not on the 6502 pins, on the socket pins of the board ).
I believe you can use one of the empty EPROM sockets.
If it looks good in that EPROM socket remove the EPROMs one at a time and place it in those positions, checking the signal again.
Dwight
 
Dwight Elvey said:
Use pin 20 of the EPROM you have in there, as the trigger for the scope.
Once you have that in there you should be able to see a nice burst of, full sized, square waves on pins 26 through 33 of the 6502's socket( not on the 6502 pins, on the socket pins of the board ).
I believe you can use one of the empty EPROM sockets.
If it looks good in that EPROM socket remove the EPROMs one at a time and place it in those positions, checking the signal again.
Dwight
Click to expand...

Thank you. This is a very interesting method. So, in this way i am actually checking all ROM Sockets whether the data bus from there to the CPU is working, correct? All ROM Sockets D3 - D9....

So i did write a 2716 for D8 and a 2732 with your code and without any problem. But its already late and the hobby room currently blocked by my girlfriend (not working on old computers;)) I will work with the scope tommorow and will let you know.

Thank you so much for this nice preparation work you did :D
 
I was going to only do part of it but realized that the instructions my be harder to do than just editing it. I did a bunch of cut and paste to simplify the problem and spent about as much time creating it as I do writing messages. I could have written some code to make the file as it is a trivial pattern but I was not at home where I could do such. There is the pointer to help you understand this format. There are several ASCII formats, of which Intel HEX and Motorola S formats are the most common. It is handy to be able to read each type. I find it is easier to put these in an editor and sprinkle spaces to separate the different fields.
I did forgot to put in the end marker but most EPROM programmers ignore it anyway.
Should you want it, it is
:00000001FF
It should work well to look at the various buffer or contention issues.
There are some tricks we can do with the DRAM but we can cross that bridge when and if we get there.
There are other things we are not dealing with on the simple NOP generator. That is yet another bridge.
Dwight
 
Dwight,
your EPROM pattern test is a good idea to test ROM data path. But why not a walking ones test like hex 01, 02, 04, 08, 10, 20, 40, and 80 instead of alternating bits? More shorted data lines could be detected this way. Or were you just making it easier for our OP to create the file?
-Dave
 
Hi,

just done the next experiment as Dwight suggested. Really hard to get a clear photo to share with you because the scope screen is flickering a lot. Please see the photos attached. Between the spikes there are also a few square wafes but my camera did not catch tem. Basically, on all data lines and across all ROM sockets the scope displayed a similiar picture. I did not get that many of square waves but a lot of spikes. I did get a slightly different picture on D9 but still with many spikes. For me it seems the data bus is in a really bad shape. What do you think?

scope data bus check 1.jpg
scope data bus check 2.jpg
scope data bus check board.jpg
 
I'm not sure what we are looking at. Are you getting a stable trigger on pin 20 of the EPROM. We are only interested in the first part of the signal after the falling edge of the signal on pin 20.
The signal will be a high speed square wave and only a burst of about 1 millisecond long of a 500KHz square wave. At the sweep rate you are using it will be about 1/2 division long burst. I should have given you the math so you'd know what to look for. The interesting part would only be seen with the sweep at .1 millisecond or faster to see the square wave. You should trigger on the negative edge of the pin 20 pulse by pulling out on the trigger knob.
We might need to modify the NOP to make the signal more viewable. The burst is quite small and the repetitions are only small amount of the total time.
Most of these signals is what is happening on the bus that is not being controlled by our EPROM.
Dwight
 
dave_m said:
Dwight,
your EPROM pattern test is a good idea to test ROM data path. But why not a walking ones test like hex 01, 02, 04, 08, 10, 20, 40, and 80 instead of alternating bits? More shorted data lines could be detected this way. Or were you just making it easier for our OP to create the file?
-Dave
Click to expand...

Hi Dave
This was a working system once. The chance of crossed data line other than adjacent line is quite small. 01010101 and 10101010 should check for adjacent shorts. I'm mainly looking for contention with other devices now. I want to make sure we can do clean reads of the EPROMs. Does this computer use 2716s or 2732s for data. I think it is suppose to use 2732s?
Dwight
 
Hi Miata
I don't think you can plug a 2716 or a 2732 directly into a 6332 socket without an adapter socket. Some of the pins will be wrong.
Dwight
 
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