>>> Can't explain how it worked like that..
The answer is that it wasn't!
The CPU will still execute the code in the EPROM (assuming you have that plugged into the correct socket. You do, don't you?
The EPROM sets the stack at the top of the 'standard' RAM. With no RAM in this location, any subroutine RETurn instruction will cause the CPU to read rubbish and jump to it... The CPU is either going to read 0x00 (NOP) or 0xFF (RST 7).
Basically, the CPU will go 'ballistic' on us...
Probably, all of the 'system' testing we have done so far is invalid...
This is one reason I recast the KEX source code and commented it - to understand what it 'should' be doing.
The EPROM basically sets things up, then calls the keyboard routine. The keyboard waits for a key to be pressed. When a key is pressed, it calls a 10 milliseconds delay subroutine. The delay subroutine will RETurn when it is finished - and that is the last thing you will do with the machine!
So, you need to check that the two RAMs AND the EPROM are in their correct sockets.
On a RESET you should observe
one quick pulse on each of the clock lines for the LED latches (IC19 pins 1, 13 and 4 pulse HIGH) then a constant stream of activity on the keyboard buffer enable (IC31 pins 1 and 15) going LOW.
In order to test things out, ONLY depress the 'S' key. This should increment the address by one. By doing one thing (and one thing only to start with) allows us to follow the logic (rather than randomly poking things). Everytime you press the 'S' key, you should observe one pulse on each of the LED latches again, followed by the stream of keyboard buffer activity as the CPU waits for another keypress.
As to your IC18 pin 8. You haven't looked at (and understood) the schematic have you? Address lines A10 through A15 go into SN74LS05 inverters. What is special about these devices? They are OPEN COLLECTOR. You can tell that by looking at the DATA SHEET for the device. Also, notice that all of the outputs are actually connected together! There is a single pull-up resistor (R4) to +5V.
So, when you are measuring pin 8 - this will not just be the inverse of pin 9, but a combination of pins 2, 4, 6, 8, 10 and 12 you are measuring!
So, how does this work?
If the address lines A10 through A15 are all logic '0' this means the output from the inverters all all OPEN CIRCUIT. R4 then pulls the signal HIGH. If any of the address lines A10 through A15 is a logic '1', then the inverter output is a logic '0' and it pulls the signal down to logic '0'. The internal active transistor of the inverter gates will ALWAYS win. So ANY logic '1' on address lines A10 through A15 will cause the output signal to be a logic '0'.
So, what you are observing on your oscilloscope is a combination of all of these gates. The signal should only go to a logic '1' when the EPROM or RAM is selected. Which should (actually) be the majority of the time...
By the way, you have paid full price for the oscilloscope, so you may as well use the whole screen to observe the signal, not just one vertical division. It doesn't cost anymore
!
Dave