pbirkel@gmail.com
Veteran Member
Thanks! Also remember everyone that the 11/84 versions of the DEC PMI have a bug where they will drop data and screw up transactions from Burst mode/Block mode DMA transfers to the J11 cache. This will corrupt your RSX11 disk at random times and is nasty.
Yes, that is something to consider on the MSV11-J! The last two etch revisions (-D for 1 MB, -E for 2 MB) are not affected, but earlier revisions (-B and -C, I've never seen a -A) are.
I'm trying to square these two statements with these comments from Pete Turnbull: https://classiccmp.org/pipermail/cctech/2018-July/033089.html
"
> The DEC PMI memories are the MSV11-J and (I think) the MSV11-R. The latter is
> rare, but the -J's can be found.
Correct, but bear in mind that there are 4 versions of the MSV11-J; the
-JB and -JC versions have different ASICs and don't support QBus CPUs.
Specifically, they don't support block-mode transfers and don't work
properly even as PMI memory except in an 11/84, while the -JE and JD
versions support everything. Bill would want the -JD (2MB) version (the
-JE version is 4MB so too big).
--
Pete
Pete Turnbull
"
@czunit appears to state that there is a problem in 11/84 PMI rather than a problem in the memory implementation of the MSV11-J. @glitch appears to state that the (only?) problem is in early revs of the MSV11-J and he's agnostic about where the module is employed. Pete states that 11/84 PMI works in the early revs of the MSV11-J as well as the later ones, which seems to contradict @czunit. Arrgh!
Why would PMI fail in an 11/84 backplane -- which is a Qbus -- but not in a regular Qbus backplane? Or vice versa? I infer that the problem originates with a device controller which wouldn't be located directly on the Qbus in an 11/84 backplane (it would be interfaced via the UBA). Gunkies appears to clarify this understanding with the following statement:
"Although it can function in QBUS-only mode (but see the note below about the -JB and -JC versions), it is really intended for use with a PMI-capable CPU, such as the KDJ11-B. In systems such as the PDP-11/83, where the primary I/O bus is the QBUS, the card 'speaks' PMI to the CPU, and QBUS to the devices. In the PDP-11/84, PMI is used for communication with both the CPU and the devices (via the KTJ11-B UNIBUS adapter)."
Now ... for the early revs Pete states that only the 11/84 worked properly whereas @czunit states that only the 11/84 fails. Gunkies appears to agree with Pete:
"The -JB and -JC are earlier versions, which contain an error which prevents them working properly as QBUS memories (i.e. in the PDP-11/83); they are only usable in the PDP-11/84."
Elided seems to be a statement to the effect that the early-rev problem lies in "speaking QBUS to the devices" (while PMI to the CPU). Am I understanding the issue here correctly?
FWIW all of the photos of 11/84 module configurations that I've seen have the CPU installed _ahead_ of one or two MSV11-J; I've never seen the MSV11-J installed upstream in a traditional PMI configuration. AFAICS from the 11/84 documentation PMI is active with the MSV11-J installed downstream of the CPU, although it can apparently be deactivated under software control. I infer that the (relatively) anomalous module order in the 11/84 is because the UBA requires PMI access and therefore C/D _always_ operates as a PMI bus.
I need to reread EK-1184E-TM-001_Dec87.pdf a few more times regarding how this all works in practice!